FPGA PAC城域网
FPGA PAC MAN (2024-01-02, Verilog, 0KB, 下载0次)
基于FPGA的数字调制系统 :实现m序列作为信源,并通过按键来选择移位相加的初始值和步进值以及实现2ASK、2FSK、2PSK
FPGA based digital modulation system: implementing m sequence as the signal source and selecting the initial and step values of shift addition through buttons, as well as implementing 2ASK, 2FSK, 2PSK (2021-06-04, Verilog, 48KB, 下载0次)
任天堂娱乐系统（NES）兼容FPGA核心
Nintendo Entertainment System (NES) compatible FPGA core (2020-06-02, Verilog, 346KB, 下载0次)
NESTang是一款用Sipeed Tang Nano 20K和Primer 20K板实现的FPGA任天堂娱乐系统
NESTang is an FPGA Nintendo Entertainment System implemented with Sipeed Tang Nano 20K and Primer 20K boards (2023-05-19, Verilog, 758KB, 下载0次)
基于FPGA的任天堂娱乐系统仿真器
FPGA-based Nintendo Entertainment System Emulator (2022-06-28, Verilog, 1346KB, 下载0次)
16qam调制 verilog语言 信源需要自己设定 可以实现16qam调制功能
The source of Verilog language with 16QAM modulation needs to be set by itself, which can realize the function of 16QAM modulation (2020-07-31, Verilog, 5KB, 下载1次)
产生15位的伪随机序列作为调制信号信源，采用频率选择法实现2FSK调制，采用鉴频法实现2FSK解调，可以仿真实现，也可使用示波器观测调制、解调信号。
A 15 bit pseudo-random sequence is generated as the source of the modulation signal. The 2FSK modulation is realized by the frequency selection method and the 2FSK demodulation is realized by the frequency discrimination method. It can be realized by simulation or by using an oscilloscope to observe the modulation and demodulation signals (2020-01-08, Verilog, 8676KB, 下载3次)
本书的主要对象是IC设计工程师，帮助他们解决IC设计和综合过程中遇到的实际问题。
The main object of this book is IC design engineers, to help them solve the practical problems encountered in IC design and integration. (2019-12-18, Verilog, 5352KB, 下载6次)
讲是时钟分频的一篇论文 各种分频 奇数偶数分频 分数分频
A Paper on Clock Frequency Dividing Various Frequency Dividing Even Frequency Dividing Fractional Frequency Dividing (2019-05-08, Verilog, 88KB, 下载2次)
实现串口一转四通信，补偿系数片内存储修正功能
Implementing Serial Port One to Four Communication, Compensation Coefficient Memory Correction Function (2019-01-06, Verilog, 1109KB, 下载0次)
cordic 算法知道正弦和余弦值，求反正切，即角度。
The CORDIC algorithm knows sine and cosine values and asks for inverse tangent, that is, angle. (2018-06-29, Verilog, 1KB, 下载7次)
基于wishbone总线的SPI主设备代码
spi master based on wishbone bus (2018-05-02, Verilog, 242KB, 下载2次)
用Verilog编写的带FOFI的UART model，比较好
FOFIUART model wrote by Verilog coding (2017-11-24, Verilog, 171KB, 下载5次)
Verilog编写的UART通信模块，比较清晰
UART model wrote by Verilog (2017-11-24, Verilog, 9KB, 下载9次)
verilog 编写的i2c代码，很好，很清晰
i2c coding wrote by verilog (2017-11-24, Verilog, 290KB, 下载10次)
通用的GPIO coding，Verilog编码
GPIO coding wrote by Verilog (2017-11-24, Verilog, 9KB, 下载4次)
因特尔所提供的fpga入门简单教程，面向外行人进行简单介绍。
Intel FPGA provided a simple entry tutorial, simple introduction for the layman. (2017-10-23, Verilog, 2291KB, 下载8次)
异步FIFO的Verilog程序及其测试程序
FPGA/Verilog FIFO_ASYN (2017-09-14, Verilog, 67KB, 下载5次)
ARM研发的AMBA(Advanced Microcontroller Bus Architecture)提供一
种特殊的机制，可将RISC处理器集成在其它IP芯核和外设中
Advanced Microcontroller Bus Architecture (2017-09-08, Verilog, 516KB, 下载6次)
UVM 的 入门实例，一个完整的能够跑通的实例。其中包括DUT代码，Testbench代码，
UVM entry example, a complete example of running through. These include the DUT code, the Testbench code, (2017-07-18, Verilog, 2966KB, 下载13次)