一个有趣的32位PowerPC类Linux RISC CPU，用于FPGA娱乐目的，
A for-fun 32-bit PowerPC -like Linux-capable RISC CPU for FPGA entertainment purposes, (2022-08-21, Verilog, 0KB, 下载0次)
powerpc处理器原型和半导体初创企业计划示例，
powerpc processor prototype and an example of semiconductor startup biz plan, (2019-02-02, Verilog, 0KB, 下载0次)
emmc储存芯片中英文协议，crc源码，sd驱动源码
EMMC storage chip Chinese and English protocol, CRC source, SD driver source (2021-04-13, Verilog, 4103KB, 下载2次)
基于ADV7511/ADV7511W/ADV7513的视频发生器
Video generator based on adv7511 / adv7511w / adv7513 (2020-01-25, Verilog, 194KB, 下载5次)
IIC从机模型，可综合RTL代码，经过了流片测试，绝对可靠。
IIC slave module,which is register transmit level code and can be synthesis.This design is tested by taped out and is reliable. (2019-05-09, Verilog, 589KB, 下载8次)
DC综合教程，讲了DC综合的原理和命令，通俗易懂
DC synthesis guide,which remark the thesis and command of logic syhthesis and Design compile (2019-05-09, Verilog, 4146KB, 下载2次)
这是小梅哥的qsys学习第三课的内容，这些资料供大家学习交流之用。
Processor
nios2 Nios II 13.0
All Components
nios2 altera_nios2_qsys 13.0
sdram altera_avalon_new_sdram_controller 13.0.1
uart_0 altera_avalon_uart 13.0.1
pio_led altera_avalon_pio 13.0.1
pio_key altera_avalon_pio 13.0.1
ir_decode ir_decode 1.0
altpll_0 altpll 13.0 (2017-07-09, Verilog, 9873KB, 下载1次)