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[VHDL/FPGA/Verilog] ZYNQsl

FPGA开发教程，含开发手册和源代码，例程齐全，很好的FPGA学习资料
A tutorial on the development of FPGA, including development manuals and source code, has complete routines and good learning materials for FPGA. (2019-06-12, C/C++, 17223KB, 下载9次)

http://www.pudn.com/Download/item/id/1560301923725413.html

[VHDL/FPGA/Verilog] quanjiaqi2

四位全加器，分模块，分层次设计而成，首先定义全加器顶层模块，然后定义1位全加器，最后定义底层半加器
Four-digit full Adder, divided into modules, and layered design. First define the full Adder top layer module, then define the 1-bit full Adder, and finally define the bottom half Adder. (2018-05-06, C/C++, 987KB, 下载0次)

http://www.pudn.com/Download/item/id/1525587580242827.html

[VHDL/FPGA/Verilog] mian

系统上电后，数码管低五位显示00000，按下PLUSE按键，显示数值加1
After power on, the digital tube is low, five shows 00000, press the PLUSE button, display the value plus 1 (2017-07-17, C/C++, 1KB, 下载1次)

http://www.pudn.com/Download/item/id/1500255448484018.html

[VHDL/FPGA/Verilog] temperature

msp430 单片机片上温度加LCD显示
msp430 temperature measure (2013-08-10, C/C++, 212KB, 下载1次)

http://www.pudn.com/Download/item/id/2326884.html

[VHDL/FPGA/Verilog] SMG2

在八位数码管上的低二位上显示0-99数字每秒加一次
Low two on eight digital tube display on a scale of 0-99 digital plus one time per second (2013-08-01, C/C++, 20KB, 下载1次)

http://www.pudn.com/Download/item/id/2319539.html

[VHDL/FPGA/Verilog] ddjs

这是简单的掉电计数程序。没开机一次数码管加一。这个程序可以很好的提供给新手
It is a simple count-down procedures. No boot time digital plus one. This program can provide a good novice (2013-07-05, C/C++, 14KB, 下载1次)

http://www.pudn.com/Download/item/id/2297099.html

[VHDL/FPGA/Verilog] LCD1602_counter

秒计数器进行加计数，然后通过液晶实时显示
increase counter (2013-05-21, C/C++, 63KB, 下载5次)

http://www.pudn.com/Download/item/id/2251646.html

[VHDL/FPGA/Verilog] mxc_i2c

我自己学习i2c时在网上看的资料加理解后写的。
study i2c (2013-01-06, C/C++, 3KB, 下载3次)

http://www.pudn.com/Download/item/id/2107734.html

[VHDL/FPGA/Verilog] 12345butterworth

详细的介绍巴特沃斯滤波器的结构和原理，以及滤波器系数计算，滤波器的设计
Detailed introduction to the structure and principles of the Butterworth filter, and the filter coefficient calculating filter design (2012-12-17, C/C++, 517KB, 下载25次)

http://www.pudn.com/Download/item/id/2086525.html

[VHDL/FPGA/Verilog] ch4511toF

ch451键盘加数码管显示从1到F显示，绝对好用
ch451 keyboard and digital display to display from 1 to F, absolutely easy to use (2012-11-30, C/C++, 1KB, 下载8次)

http://www.pudn.com/Download/item/id/2066731.html

[VHDL/FPGA/Verilog] 99

两位数码管显示程序，加动1，加到99清零，同时配合LED灯闪亮
Two digital tube display program, plus moving 1 added 99 cleared, in conjunction with LED lights flashing (2012-11-26, C/C++, 28KB, 下载3次)

http://www.pudn.com/Download/item/id/2061784.html

[VHDL/FPGA/Verilog] red-logic-Slave-FIFO_USB

红色飓风开发板程序 Slave FIFO_USB， cy68013加FPGA源码，完成USB通讯
Red hurricane development board procedures the Slave FIFO_USB, cy68013 plus FPGA source code, complete USB communication (2012-10-23, C/C++, 7962KB, 下载68次)

http://www.pudn.com/Download/item/id/2024304.html

[VHDL/FPGA/Verilog] cc2430-ADXL345

使用I2C协议编写成功的程序，三轴加速度计ADXL
I2C protocol to write a successful program, triaxial accelerometer ADXL (2012-09-22, C/C++, 44KB, 下载29次)

http://www.pudn.com/Download/item/id/1999486.html

[VHDL/FPGA/Verilog] jishuqi

0-99计数器精度0.1 有四个键控制自加自减步进加减
0-99 There are four key counter precision control from 0.1 plus minus step addition and subtraction from (2011-08-07, C/C++, 59KB, 下载6次)

http://www.pudn.com/Download/item/id/1616974.html

[VHDL/FPGA/Verilog] ILI9481IC-RGBPspi

ILI9481IC RGB接口用spi点屏的方法，非常有用，申请站长加精
ILI9481IC RGB screen interface with spi point method, very useful application for owners of Concentrate (2011-04-21, C/C++, 47KB, 下载25次)

http://www.pudn.com/Download/item/id/1499947.html

[VHDL/FPGA/Verilog] ledxianshizidongjia

数码管动态显示4位数字自动加实现数码管的显示，4位自动加
LED dynamic display 4-digit automatic (2010-11-28, C/C++, 13KB, 下载4次)

http://www.pudn.com/Download/item/id/1361377.html

[VHDL/FPGA/Verilog] counter

4位数码管显示,4个按键如加,减,自动加,清零等.
4 digital display, four buttons, such as addition, subtraction, automatic, clear, etc.. (2010-05-19, C/C++, 13KB, 下载22次)

http://www.pudn.com/Download/item/id/1179039.html

[VHDL/FPGA/Verilog] c8051lcd

c8051 LCD源程序，非常经典！推荐加经典
c8051 LCD source, the very classic! Suggest increase classic (2007-06-20, C/C++, 9KB, 下载34次)

http://www.pudn.com/Download/item/id/298152.html

[VHDL/FPGA/Verilog] VHDL大作业－虞益挺036100486

全加器的VHDL程序实现及仿真
full adder VHDL simulation program and (2005-01-13, C/C++, 86KB, 下载25次)

http://www.pudn.com/Download/item/id/1105593356485726.html

[VHDL/FPGA/Verilog] 基于半加器的全加器描述及仿真

vhdl基于半加器的全加器描述及仿真
VHDL-based increases for the entire increase Description and Simulation (2005-01-13, C/C++, 193KB, 下载25次)

http://www.pudn.com/Download/item/id/1105591470901327.html