联合开发网   搜索   要求与建议
                登陆    注册
排序按匹配   按投票   按下载次数   按上传日期
按分类查找All 其他(3) 
按平台查找All Multisim(3) 

[其他] Design完整电路

主持人预置每组100分,主持人按准备按钮,宣布准备抢答并述题。判断有无违规抢答者,如果有违规提前抢答者(选手抢答台红灯亮并发出声音),则宣布本题失败并做违章处理(减分或警告),然后返回前一步;如果没有违章提前抢答者,则主持人按开始抢答按钮,宣布开始抢答。选手按自己对应的抢答按钮,成功抢答的选手所对应的绿灯亮并发出声音。若选手答对问题,则主持人给其加10分,否则减10分。之后进行下一题或宣布抢答结束。
The moderator presets 100 points for each group. The moderator presses the prepare button to announce that he is ready to answer and describe the topic. Determine if there is a violation answerer, if there is a violation answerer ahead of time (the red light on the contestant answering desk lights up and emits a sound), then declare the failure of this question and do violation handling (point reduction or warning), then return to the previous step; Otherwise, the host presses the start answering button to announce the start of answering. The contestant presses his corresponding answer button, and the green light corresponding to the successful contestant lights up and makes a sound. If the player answers the question correctly, the host will add 10 points to it, otherwise 10 points will be deducted. Then proceed to the next question or announce the end of the rush response. (2020-04-20, Multisim, 982KB, 下载0次)

http://www.pudn.com/Download/item/id/1587373546708387.html

[其他] full-adder

利用双74LS151芯片制作基于multisim的全加器仿真实例
The full adder simulation example based on Multisim is made by using double 74LS151 chips. (2019-06-19, Multisim, 99KB, 下载2次)

http://www.pudn.com/Download/item/id/1560954330838965.html

[其他] 维也纳整流

三相维也纳整流psim仿真,闭环可调,稳妥可用
PSIM simulation of three-phase Vienna rectifier with adjustable closed-loop (2019-02-19, Multisim, 15KB, 下载22次)

http://www.pudn.com/Download/item/id/1550583284393394.html
总计:3