求整数x，使y=x2的各位数字为严格递增序列。如：372=1369中，1、3、6、9是严格递增序列；又如，1、3、6、6、9就不是一个严格递增序列。试建立一个类RISE，完成求出某范围内，满足条件的所有x及其平方数和x的个数。
X, so that the number of y=x2 to strictly increasing sequence. Such as: 372=1369, 1, 3, 9, 6 is a strictly increasing sequence and if, 1, 3, 6, 6, 9 is not a strictly increasing sequence. Try to establish a class RISE, complete a range, meet the conditions of all x and the number of square and X number. (2015-08-31, Visual C++, 1KB, 下载1次)
关于一个软件的测试，我试了试挺好，就发白总奥这上边来了
About a software test, I tried the fine, white always the above this (2014-05-12, Visual C++, 16KB, 下载2次)
spi总线的vhdl代码，试了了试能用。希望能对开发者有所帮助。
spi bus vhdl code, try the test can be used. The hope is to help developers. (2012-08-25, Visual C++, 337KB, 下载3次)
USB_CY7C68013_固件程序+FPGA测试试Verilog程序
USB_CY7C68013_ firmware program+FPGA test test Verilog program (2012-08-22, Visual C++, 196KB, 下载5次)
为达到干涉合成孔径声纳系统对信号源的特殊要求,提出了一种基于SOPC技术的FPGA实现方法,该信号源一方面提供给发射机模拟信号,还给回波信号采集系统提供时钟和同步信号以保证信号系统时间一致性,同时还给接收机的时变增益信号实现对回波信号衰减的补偿 另一方面还实时采集并传输声纳系统在水下的运动姿态、深度、压力等信息 经过湖试和海试,该信号源系统完成了模拟信号和数字信号各项指标的测试,满足设计要求。
To reach the special requirements interferometric synthetic aperture sonar system signal source based on the the SOPC technology of FPGA implementations, the signal source is provided to the transmitter and analog signal back to the echo signal acquisition system clock and synchronization signal in order to ensure the consistency of the signal system time, but still give the time-varying gain signal receiver of the echo signal attenuation compensation the other hand, real-time acquisition and transmission of the sonar system in underwater sports attitude, depth, pressure, etc. Information After the lake trial and sea trial, the source system to complete the testing of analog and digital signals indicators meet the design requirements. (2012-08-21, Visual C++, 478KB, 下载8次)
编程学习资料 点亮LED灯 再玩出各种花样的基础
Programming learning material lit LED lights and play out all sorts of figure foundation
(2012-07-31, Visual C++, 117KB, 下载4次)
使用FPGA开发板，VHDL语言写的一个红外线解码模块，
部分代码制作细微修改即可引用于不同红外线芯片。稳定度高（一再开发板上调试通过）
Using the FPGA development board, VHDL language to write an infrared decoder module
Making minor changes to some of the code refer to different infrared chip. High stability (repeated on the development board through debugging)
(2010-12-02, Visual C++, 502KB, 下载12次)