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[VHDL/FPGA/Verilog] Canary

具有嗅探总线互连（MESI协议）的硬件调度双核RISC-V（OOO IMAC+流水线IA）处理器--全部在SystemVerilog中
Hardware Scheduled Dual Core RISC-V (OOO IMAC + Pipelined IA) Processor with a snoop bus interconnect (MESI Protocol) -- all in SystemVerilog (2024-05-21, Assembly, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1716254143614534.html

[VHDL/FPGA/Verilog] QNICE-FPGA

QNICE-FPGA是一个用于娱乐编程的16位计算机系统，作为一个成熟的片上系统端口...
QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL. (2023-05-06, Assembly, 12587KB, 下载0次)

http://www.pudn.com/Download/item/id/1683369047909732.html
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