VHDL课程的项目99秋季-与Alireza Mohammadi合作
The Projects of VHDL course Fall 99 - in collaboration with Alireza Mohammadi (2021-01-23, HTML, 2027KB, 下载0次)
双核MIPS CPU。功能11 32位指令,8位数据路径,仲裁器,MMU和ROM。使用RAM模块验证...
A Dual Core MIPS CPU. Feature 11 32-bit instructions, 8-bit datapath, Arbiter, MMU, and ROM. Verified using RAM module which encoded a Fibonacci program and via Randomized test bench. (2023-03-06, HTML, 7206KB, 下载0次)
与GalaxiasKyklos合作在verilog中实现简单的生命游戏
Simple Game of Life implementation done in verilog in collaboration with GalaxiasKyklos (2016-07-14, HTML, 729KB, 下载0次)
本文献介绍了基于32位架构的双发射流水线设计。
design of 32bits CPU (2013-11-16, HTML, 1832KB, 下载2次)