金鼎娱乐合作Ｑ2082692670双凤塔下载搜索联合开发网

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按平台查找： All C++(9)

[VHDL/FPGA/Verilog] iverilog

IVerilog被黑客攻击与emscripten合作，
IVerilog hacked to work with emscripten, (2014-07-24, C++, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1693651149168538.html

[VHDL/FPGA/Verilog] FPGA_UART-and-Arduino_OLED

本demo功能是实现:fpga读取双路12位adc的值后,通过串口将数据发送到arduino,arduino再进行串口解析将数据,将数据发送给oled显示。
The demo function is to achieve: after reading the values of dual 12-bit ADCs on the FPGA, the data is sent to the Arduino through the serial port, which then parses the data through the serial port and sends it to the OLED for display. (2022-09-12, C++, 648KB, 下载0次)

http://www.pudn.com/Download/item/id/1662942985244702.html

[VHDL/FPGA/Verilog] FPGABiquadDeluxe

如果一辆车的价格可以买到11辆，为什么要满足于一辆双四轮车呢
Why be content with a single biquad if you can have up to 11 for the price of one (2018-08-24, C++, 676KB, 下载0次)

http://www.pudn.com/Download/item/id/1535113531240118.html

[VHDL/FPGA/Verilog] daphne-benchmark

达姆施塔特汽车并行异构基准套件
The Darmstadt Automotive Parallel HeterogeNEous (DAPHNE) Benchmark-Suite (2021-11-02, C++, 18585KB, 下载0次)

http://www.pudn.com/Download/item/id/1635848334261584.html

[VHDL/FPGA/Verilog] rosetta

罗塞塔：用于软件可编程FPGA的逼真的高级综合基准套件
Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs (2023-01-24, C++, 27673KB, 下载0次)

http://www.pudn.com/Download/item/id/1674561485242656.html

[VHDL/FPGA/Verilog] verilog-nes

在Verilog中构建任天堂娱乐系统
Building a Nintendo Entertainment System in Verilog (2022-09-04, C++, 9379KB, 下载0次)

http://www.pudn.com/Download/item/id/1662279701495377.html

[VHDL/FPGA/Verilog] SysInfo108

本代码完成了系统CPU类型，是否双核，速率，出厂时间等功能。
The code completion system CPU type, whether the dual-core, velocity, time factory functions. (2016-06-18, C++, 5KB, 下载1次)

http://www.pudn.com/Download/item/id/1466216147413277.html

[VHDL/FPGA/Verilog] SysInfo108

本代码完成了系统CPU类型，是否双核，速率，出厂时间等功能。
The code completion system CPU type, whether the dual-core, velocity, time factory functions. (2016-05-08, C++, 6KB, 下载1次)

http://www.pudn.com/Download/item/id/1462650192885681.html

[VHDL/FPGA/Verilog] APB3_slave_Keil

keil环境下，在smartfusion开发板上实现arm与FPGA双核通信的软件设计
keil environment in the the SmartFusion development of on-board, ARM and FPGA dual-core communications software design (2013-05-21, C++, 307KB, 下载7次)

http://www.pudn.com/Download/item/id/2252792.html

总计:9