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按分类查找： VHDL/FPGA/Verilog(12) 嵌入式/单片机/硬件编程(1) 硬件设计(1)

按平台查找： All SystemVerilog(14)

[硬件设计] ethernet_10baset

自我指导项目，目标是熟悉以太网分组的结构，使用Zedboard Zync 7000通过有线连接发送数据分组，并开发自检UVM测试台，在合成之前验证模块。
Self directed project with the goals of familiarizing myself with the structure of an ethernet packet, using the Zedboard Zync 7000 to send data packets via wired connection, and develop a self checking UVM testbench to verify the module before synthesis. (2024-07-28, SystemVerilog, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1722160666571987.html

[嵌入式/单片机/硬件编程] tt07-mos6502

再现Atari 2600、Atari 8位系列、Apple II、任天堂娱乐系统、Commodore 64、Atari-Lynx和BBC Micro中使用的mos 6502 cpu
Recreation of the mos 6502 cpu used in the Atari 2600, Atari 8-bit family, Apple II, Nintendo Entertainment System, Commodore 64, Atari Lynx, and BBC Micro (2024-06-03, SystemVerilog, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1717393248631657.html

[VHDL/FPGA/Verilog] snestang

用于Tang Primer 25K FPGA的超级任天堂娱乐系统
Super Nintendo Entertainment System for Tang Primer 25K FPGA (2024-01-07, SystemVerilog, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1704673601461114.html

[VHDL/FPGA/Verilog] Ethernet-packet-Loopback-design-verification

使用SystemVerilog进行以太网分组环回设计验证，
Ethernet packet loopback design verification using SystemVerilog, (2017-10-07, SystemVerilog, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1694138387891656.html

[VHDL/FPGA/Verilog] 10-gigabit-ethernet-mac-verification

使用SystemVerilog OOP测试台验证万兆以太网MAC，
Verification of a 10 Gigabit Ethernet MAC using a SystemVerilog OOP Testbench, (2017-05-08, SystemVerilog, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1694138204107276.html

[VHDL/FPGA/Verilog] 10g-low-latency-ethernet

10G低延迟以太网
10G Low Latency Ethernet (2023-05-08, SystemVerilog, 85KB, 下载0次)

http://www.pudn.com/Download/item/id/1683511530202948.html

[VHDL/FPGA/Verilog] Xilinx_Ethernet_1G

FPGA 1Gbps以太网与UDP数据传输芯片评估
FPGA 1Gbps ETHERNET With UDP Data Transfer for Chip Evaluation (2020-05-24, SystemVerilog, 18219KB, 下载0次)

http://www.pudn.com/Download/item/id/1590280522366376.html

[VHDL/FPGA/Verilog] Switch2019

基于FPGA创建以太网交换机
Create Ethernet switch based on FPGA (2019-05-15, SystemVerilog, 41KB, 下载0次)

http://www.pudn.com/Download/item/id/1557885899765143.html

[VHDL/FPGA/Verilog] EthernetSniffer

以太网嗅探器设计用于Terasic DE2i-15上的串联Cyclone V FPGA和Intel Atom处理器（Cedarview N2600）...
Ethernet Sniffer designed for tandem Cyclone V FPGA and Intel Atom Processor (Cedarview N2600) on the Terasic DE2i-150 Rev. C board (2015-12-15, SystemVerilog, 2930KB, 下载0次)

http://www.pudn.com/Download/item/id/1450116229746488.html

[VHDL/FPGA/Verilog] tiao-yi-tiao

来自微信的“跳一跳”游戏的verilog版本
a verilog version of "tiao-yi-tiao" game from WeChat (2019-12-24, SystemVerilog, 42KB, 下载0次)

http://www.pudn.com/Download/item/id/1577155758171922.html

[VHDL/FPGA/Verilog] gemmm2s

Verilog模块，用于从Zynq GEM以太网DMA的AXI4MM转换为具有数据包边界的AXI流
Verilog module for converting from AXI4 MM of Zynq GEM Ethernet DMA to AXI- Stream with packet boundaries (2020-09-29, SystemVerilog, 94KB, 下载0次)

http://www.pudn.com/Download/item/id/1601318451904466.html

[VHDL/FPGA/Verilog] witch-with-Verification-Environment-SystemVerilog

以太网交换机，具有2个输入和2个输出端口以及带溢出停滞信号的可变长度FIFO。测试台环境...
Ethernet Switch with 2 input and 2 output port and a variable length FIFO with overflow stall signals. Test bench Environment using random constrains (2019-08-13, SystemVerilog, 11KB, 下载0次)

http://www.pudn.com/Download/item/id/1565633780272553.html

[VHDL/FPGA/Verilog] Ethernet_switch_verification

以太网交换系统Verilog的验证
Verification of Ethernet Switch System Verilog (2016-10-21, SystemVerilog, 8KB, 下载0次)

http://www.pudn.com/Download/item/id/1476996188762792.html

[VHDL/FPGA/Verilog] Tri-Mode-Ethernet-MAC-10-100-1000-

以太网MAC系统验证日志
Ethernet-MAC System verilog (2018-05-28, SystemVerilog, 21KB, 下载0次)

http://www.pudn.com/Download/item/id/1527500349736184.html

总计:14