Loggy是通用ASIC EDA软件的日志文件浏览器。目前，它可以满足PNR（地点和路线）工具Innovus。，
Loggy is a log file browser for common ASIC EDA softwares. Currently, it can cater the PNR (place and route) tool Innovus., (2022-10-01, Perl, 0KB, 下载0次)
一个玩具verilog模拟器，
A toy verilog simulator, (2016-06-19, Perl, 0KB, 下载0次)
OSS CVC verilog模拟器的Dockerfile，
Dockerfile for OSS CVC verilog simulator, (2018-06-27, Perl, 0KB, 下载0次)
Terasic DE系列FPGA开发板的高级视频数字化器附加模块。，
Advanced video digitizer add-on module for Terasic DE series FPGA development boards., (2023-08-27, Perl, 0KB, 下载0次)
Verilog HDL预处理器，
Verilog HDL preprocessor, (2023-08-24, Perl, 0KB, 下载0次)
用于uvm测试台的系统verilog寄存器模型。
System verilog register model for uvm testbenches. (2018-08-29, Perl, 1848KB, 下载0次)
NoC（片上网络）生成器，用于生成由片上路由器组成的NoC的Verilog HDL模型
NoC (Network-on-Chip) generator that generates Verilog HDL model of NoC consisting of on-chip routers (2019-12-30, Perl, 29KB, 下载0次)
Verilog Perl包的Verilog解析器、预处理器和相关工具
Verilog parser, preprocessor, and related tools for the Verilog-Perl package (2022-09-28, Perl, 406KB, 下载0次)
经过对系统做需求分析，详细功能设计、编码，模块连接，并利用FPGA实现相应的功能，经过波形仿真、下载调试，验证了设计方案的可行性及实现方法的有效性，基本实现了系统的要求。
Microwave controller system is a utility-type system that includes not only the function of simple operation, but also good effect of cook. According to fixed routine, you can cook some homely dish via taking different time and different level firepower to heat, and this can not only save time, but also save energy. It mainly includes a couple of modules as follows: input module, control module and display module. Input module fulfills key-press scanning and keyboard decoding, control module includes status switching control, data loading, cook time, temperature control, sound effect tip and so on, display module comes down to display coding decipher and the flashing of indicator light. Through the analysis of requirement, detailed function design, coding, module connection, using FPGA to fulfill relevant function. (2012-02-21, Perl, 98KB, 下载2次)