基于DDS和SOPC的谐波信号发射器，拥有可调节的频率，阶段和谐波比例的谐波信号发射器由本文所设计。
Based on DDS and SOPC harmonic signal transmitter, with adjustable frequency, phase and harmonic proportion of harmonic signal transmitter designed by this article. (2016-04-26, WORD, 14KB, 下载3次)
MODELSIM 中保存波形并重新打开波形的方法
modelsim save and open wave again (2015-05-14, WORD, 530KB, 下载1次)
DDS Technology DDS技术与原理
DDS Technology (2012-10-06, WORD, 575KB, 下载4次)
基于FPGA的波形信号发生器的设计和实现，利用VHDL语言实现正弦波三角波等波形信号输出
The waveform signal generator based on FPGA design and implementation, using VHDL language to realize sine wave triangular wave and waveform signal output (2012-09-08, WORD, 2004KB, 下载4次)
一篇关于用FPGA设计DDS的文章，个人觉得还是写得不错的，有着做这个的同学可以下载看看。
An article on the FPGA design of DDS, personally feel that is well written, has to do this students can download to see. (2012-07-27, WORD, 139KB, 下载5次)
函数信号发生器的组装与调试Assembly and debugging of the Function Generator
Assembly and debugging of the Function Generator (2012-07-15, WORD, 51KB, 下载3次)
本文主要讨论了Verilog语言的基于DDS的波形发生器的设计。从设计要求入手，本文给出了DDS的详细设计过程，包括各个模块的设计思想，电路图，Verilog语言程序代码。其大致思想为通过频率控制字和相位控制字去控制正弦函数的ROM存储表的地址并对应着得到其幅度值，最终达到输出需要波形的目的。
This paper mainly discusses the design of the Verilog language, the DDS-based waveform generator. Starting from the design requirements, this paper presents the detailed design of the DDS process, including the various modules of the design ideas, schematics, Verilog language code. The general idea of frequency control word and phase control word to control the address of the ROM memory table of the sine function and the corresponding get its amplitude value, and ultimately achieve the purpose of waveform output needs. (2012-05-10, WORD, 795KB, 下载128次)
关于电子测量信号发生器一些基本资料，很实用。
Electronic Measurement Signal Generator on some basic information, very useful (2011-12-20, WORD, 1351KB, 下载5次)
如何产生一个正弦信号发生器，设计方案，原理图
How to generate a sinusoidal signal generator, design, schematic (2011-08-25, WORD, 16KB, 下载6次)
基于FPGA的波形发生器设计，详细的介绍了波形发生器的各种参数设计
FPGA-based waveform generator design, a detailed description of the design parameters of the waveform generator (2011-08-22, WORD, 67KB, 下载20次)
EDA技术和VHDL语言实用模块设计，点击驱动，dds，频率计等等、、、
EDA technology and VHDL functional module design, click the drive, dds, frequency meter, etc.,,, (2011-07-31, WORD, 1538KB, 下载3次)
本题设计一个数字存储示波器，以Xilinx公司20万门FPGA芯片为核心，辅以必要的外围电路（包括信号调理、采样保持、内部触发、A/D转换、D/A转换和I/O模块），利用VHDL语言编程，实现了任意波形
The problem to design a digital storage oscilloscope, to Xilinx, Inc. 200,000 FPGA chip as the core, supplemented by the necessary peripherals (including signal conditioning, sample and hold, the internal trigger, A/D converter, D/A conversion and I/O modules) using VHDL language programming, the arbitrary waveform (2011-07-31, WORD, 14KB, 下载10次)
本论文设计的任意波形发生器所要实现的基本功能：
(1)输出波形的种类：正弦波、方波、三角波、锯齿波、脉冲波、手绘任意波形、任意公式波形。
(2)输出波形每一通道的频率、幅值、偏置都可以由用户调节，并且可以设置多个通道信号之间的相位差。
(3)编辑波形的方式有：设置参数、输入公式、手工绘制通信波特率的全部功能在PC机上实现。
In this thesis, the arbitrary waveform generator to achieve the basic functions: (1) the type of output waveform: sine, square, triangle wave, sawtooth, pulse, arbitrary waveform hand, any formula waveform. (2) The output waveform of each channel' s frequency, amplitude, offset can be adjusted by the user, and you can set the phase difference between multiple-channel signal. (3) the way the waveform editor: set parameters, enter the formula, hand-painted communication baud rate of the PC, all functions in the implementation. (2011-06-02, WORD, 576KB, 下载116次)
基于verilog hdl 的DDS设计
The DDS-based design of verilog hdl (2010-12-22, WORD, 388KB, 下载5次)
这次设计的抢答器主要四部分组成，由优先编码器，寄存器和译码器组成的抢答电路，十进制计数器组成的倒计时电路，555定时器组成的秒脉冲发生器，十六进制计数器组成的计数器。
The design of the Responder mainly of four parts, by the priority encoder, register, and the composition of the answer in the decoder circuit, consisting of decimal counter countdown circuit, 555 timer pulse generator consisting of seconds, consisting of the hexadecimal counter counter. (2010-09-10, WORD, 304KB, 下载6次)
跳频源的几种设计方法，DDS和宽带的跳频设计方案
Several design methods of frequency hopping source, DDS, and design of broadband frequency-hopping (2010-05-23, WORD, 5066KB, 下载30次)
20多个FPGA设计实例（程序+仿真图),包含LED控制，LCD控制，出租车计价器VHDL程序与仿真，波形发生程序，步进电机定位控制系统VHDL程序与仿真等等，VHDL语言编译。
More than 20 instances of FPGA design (process+ simulation map), contains the LED control, LCD control, taxi meter VHDL procedures and simulation, waveform process, stepping motor position control system and simulation of VHDL procedures and so on, VHDL compiler. (2010-05-21, WORD, 1252KB, 下载9次)
基于FPGA的任意信号发生器，毕业设计完整稿，适合做毕设的同学参考
FPGA-based arbitrary signal generator, a complete draft graduation project, suitable for students to complete reference (2009-07-27, WORD, 80KB, 下载101次)
基于FPGA的乐曲发生器电路设计 附含源代码（quartersii环境下运行）
FPGA-based circuit design of the music generator containing the source code is attached (quartersii environment to run) (2009-04-18, WORD, 29KB, 下载2次)
基于可编程逻辑器件CPLD和直接数字频率合成技术（DDS）的三相多波形函数发生器
based CPLD and direct digital frequency synthesis (DDS) over the three-phase waveforms letter Number Generator (2006-11-15, WORD, 90KB, 下载20次)