Arty A7-100T与BME280压力传感器的集成，用于压力传感和FPGA测试
Integration of Arty A7-100T with BME280 Pressure Sensor for Pressure Sensing and FPGA Testing (2024-01-15, Verilog, 0KB, 下载0次)
流水线处理器是设计、实现和测试哈佛（用于数据和指令的单独存储器），类似RISC，五阶段pi...，
?? Pipelined Processor is to design, implement and test a Harvard (separate memories for data and instructions), RISC-like, five-stages pipeline processor. (2023-10-16, Verilog, 0KB, 下载0次)
用于相关工具测试的开放HDL模块、子系统和微处理器（基准测试）的集合。，
Collection of open HDL modules, subsystems and microprocessors (benchmarks) that are used for related tools testing., (2023-08-09, Verilog, 0KB, 下载0次)
宏放置-基准、评估器和开源领先方法的可复制结果
Macro Placement - benchmarks, evaluators, and reproducible results from leading methods in open source (2023-06-02, Verilog, 585194KB, 下载0次)