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按分类查找All 汇编语言(6) 
按平台查找All Verilog(6) 

[汇编语言] Verilog源代码

多种基本功能的Verilog代码实现,包括多路选择器,二进制到BCD码转换,二进制到格雷码转换,7段译码器,8位数据锁存器,移位寄存器等等多种功能。
Verilog code implementation of a variety of basic functions, including multiplexer, binary to BCD code conversion, binary to Gray code conversion, 7-segment decoder, 8-bit data latch, shift register and many other functions. (2019-06-08, Verilog, 18KB, 下载3次)

http://www.pudn.com/Download/item/id/1559969153746811.html

[汇编语言] Synchronizer01

一种同步器的FPGA表示,采用二级k触发器实现同步器的功能
A kind of synchronizer is represented by FPGA. The function of synchronizer is realized by two-stage k-flip-flop. (2019-04-18, Verilog, 129KB, 下载0次)

http://www.pudn.com/Download/item/id/1555575787434612.html

[汇编语言] compare

用Verilog设计一个比较器,实现对输入数字比较功能
Design a comparator with Verilog to realize the function of comparing input numbers (2018-12-03, Verilog, 409KB, 下载1次)

http://www.pudn.com/Download/item/id/1543806642621653.html

[汇编语言] combination.zip

实现计算两数之差绝对值的verilog代码,包括顶层结构和底层结构代码:全加器、比较器、数据选择器等
The verilog code that computes the absolute value of the two Numbers, including the top-level structure and the underlying structure code: the whole addition, comparator, data selector, and so on. (2018-05-02, Verilog, 5KB, 下载0次)

http://www.pudn.com/Download/item/id/1525265240925138.html

[汇编语言] 单周期完成版

写一个单周期处理器运行一段mips指令,并包含mips指令转汇编码的程序
Write a single cycle processor to run a section of MIPS instruction (2018-04-24, Verilog, 24KB, 下载9次)

http://www.pudn.com/Download/item/id/1524546840413363.html

[汇编语言] dds_rom

基于查找表的DDS的Verilog实现,分为相位累加器模块、ROM模块和顶层DDS模块
Verilog implementation of DDS based on lookup table (2018-04-03, Verilog, 3KB, 下载8次)

http://www.pudn.com/Download/item/id/1522744734295492.html
总计:6