利用dds产生方波载波，经测试波形完整，可以根据实际需要调整频率
Square wave carrier is generated by DDS, and the tested waveform is complete (2021-04-01, Verilog, 202KB, 下载0次)
pfm驱动方波发生器,使用FPGA驱动2路igbt
PFM is used to drive square wave generator and FPGA is used to drive 2-way IGBT (2021-02-17, Verilog, 3KB, 下载2次)
dds生成正弦波文件,主要是用ip核，通过改变相位控制字来实现频率的调节。
generate the sine waveform using the dds. (2021-01-28, Verilog, 11985KB, 下载0次)
示波器设计，首先，AD模块对模拟信号进行采样，触发电路根据采样信号判断触发条件。满足触发条件后，连续采样一定数量的点（本系统中为640个点），存储到RAM中。峰峰值、频率计算模块对RAM中储存的波形数据进行计算，得到波形的频率以及峰峰值；VGA模块将波形显示出来，并显示计算得到的峰峰值和频率数值。
Firstly, the ad module samples the analog signal, and the trigger circuit judges the trigger condition according to the sampling signal. After meeting the trigger conditions, a certain number of points (640 points in this system) are sampled continuously and stored in RAM. The peak to peak and frequency calculation module calculates the waveform data stored in RAM to obtain the frequency and peak to peak of the waveform; the VGA module displays the waveform and displays the calculated peak to peak and frequency values. (2021-01-02, Verilog, 230KB, 下载1次)
改变频率字，实现任意频率（0.00016hz~6Mhz）sine波形输出。
Change the frequency word to realize arbitrary frequency(0.00016hz~6Mhz)sine waveform output. (2020-06-24, Verilog, 3231KB, 下载0次)
pwm_gen，PWN波形发生器，开关波形
pwm_gen,PWM wave generate ,use vivado software (2020-06-11, Verilog, 13KB, 下载0次)
用 AD9910实现的DDS 线性调频信号,调试已通过 可以使用
DDS LFM signal realized by ad9910 has passed debugging and can be used (2019-10-23, Verilog, 1475KB, 下载21次)
一个vivado和matalab混合编程的信号发生器，注意要把vivado里面的核文件路径改一下
A signal generator with mixed programming of vivado and matalab, pay attention to changing the path of the core file in vivado (2019-06-18, Verilog, 534KB, 下载52次)
控制9914芯片，生成数字信号，芯片为DDS专业芯片，实践验证可以使用。
Control 9914 chip to generate digital signal. The chip is DDS professional chip, which can be used in practice. (2019-02-27, Verilog, 2KB, 下载1次)
画波形 工具 方便
waveform tool (2018-07-06, Verilog, 1278KB, 下载0次)
基于FPGA的ISE环境下的任意波信号发生器
Arbitrary wave signal generator in ise environment based on FPGA (2018-06-15, Verilog, 2KB, 下载2次)
用verilog编写的dds程序，包含顶层和各模块
DDS program written in Verilog (2018-05-29, Verilog, 51KB, 下载2次)
AD9767高速双通道DAC模块资料包，含使用说明，DDS工程源码
Ad 9767 high-speed dual-channel DAC module data package, including instructions, DDS engineering source code (2018-05-02, Verilog, 39426KB, 下载26次)
使用verilog语言实现包括正弦波、余弦波、锯齿波的发生。
Verilog realization of waveform generator (2018-04-30, Verilog, 1KB, 下载3次)
使用verilog语言实现锯齿波的产生，完美调试成功
The use of Verilog language to produce sawtooth waves (2018-04-30, Verilog, 8KB, 下载4次)
DDS FPGA Verilog vhdl
DDS FPGA Verilog vhdl (2018-04-15, Verilog, 176KB, 下载16次)
该文件是dds工程，用的是单片机和FPGA开发板组合实现对存储在FPGA中rom里面的波形数据的，调频率（调频范围是1-1MHz），波形在示波器上显示，单片机实现控制字的发送及控制频率，FPGA实现控制字的接收和存储波形数据,输出波形
The file is a DDS project. It is a combination of single chip microcomputer and FPGA development board to realize the amplitude modulation of the waveform data stored in the ROM in FPGA. The frequency modulation rate, the waveform shows on the oscilloscope, the MCU realizes the transmission of the control word, and the FPGA realizes the receiving and storing the waveform data of the control word. (2018-04-13, Verilog, 1039KB, 下载2次)
可以产生数字波形信号，频率可调，相位可调
Can produce the digital waveform signal, the frequency is adjustable, the phase is adjustable (2017-12-03, Verilog, 458KB, 下载4次)
描述了verilog实现的DDS信号发生器，可以经过FPGA验证，包括了代码实现以及书写。代码可以经过altera的EDA工具进行了验证，可以实现信号发生器的基本功能。希望大家珍惜，并好好学习。
Describes the Verilog implementation of the DDS signal generator, which can be verified by FPGA, including code implementation and writing. Code can be verified by the Altera EDA tool, you can achieve the basic functions of the signal generator. I hope you will cherish and study well. (2017-09-12, Verilog, 102KB, 下载12次)
用FPGA实现的DDS，用法简单，波形稳定
DDS is implemented using FPGA (2017-08-01, Verilog, 1931KB, 下载2次)