用中规模MSI基本逻辑功能模块 实现关模比较器（要求分别使用中规模和语言实现）：
功能要求：它的输入是两个8位无符号二进制整数X和Y，以及一个控制信号S；输出信号为1个8位无符号二进制整数Z。输入输出关系为：当S=1时， Z=min(X,Y)；当S=0时， Z=max(X,Y)。
Modeling comparator is implemented by using basic logic function modules of medium-scale MSI (medium-scale and language are required respectively):
Functional requirements: Its input is two 8-bit unsigned binary integers X and Y, and a control signal S; the output signal is an 8-bit unsigned binary integer Z. The relationship between input and output is: when S = 1, Z = min (X, Y); when S = 0, Z = max (X, Y). (2019-05-20, Vivado, 10KB, 下载1次)
KCPSM6 PicoBlaze(以下简称KCPSM6)8位嵌入式处理器是Xilinx公司为Spartan 6、Virtex 6和7系列FPGA设计的嵌入式处理器软核，它具有效率高、占用资源少等优点，可以方便地嵌入到硬件系统设计中，实现与其他功能模块的无缝连接。它仅占用26个Slice和1个BRAM，占XC6SLX4器件4．3％的资源、XC6SLX150T器件不到0．11％的资源。KCPSM6嵌入式处理器具有高达52～120 MIPS的指令执行速度，具体速度取决于所选用的FPGA所属系列和器件速度等级。
KCPSM6 PicoBlaze (hereinafter referred to as KCPSM6) 8 bit embedded processor is the embedded processor soft core designed by Xilinx company for Spartan 6, Virtex 6 and 7 series FPGA. It has the advantages of high efficiency and less resources. It can be conveniently embedded in the design of hardware system and realize the seamless connection with other functional modules. It occupies only 26 Slice and 1 BRAM, accounting for 4.3% of XC6SLX4 devices and less than 0.11% of XC6SLX150T devices. The KCPSM6 embedded processor has an instruction execution speed of up to 52~120 MIPS, and the specific speed depends on the series and device speed level of the selected FPGA. (2018-06-09, Vivado, 8410KB, 下载0次)