5 个ARM core HDL实现,设计的还不错
ARM core HDL implementation (2018-04-12, VHDL, 1125KB, 下载5次)
基于verilog的DDS设计,内附代码,仿真环境等说明
the DDS design based on verilog (2015-07-14, VHDL, 3091KB, 下载13次)
FPGA 串口通信方法1 亲测能用,来自小桥流水的博客
FPGA Serial communication
http://blog.sina.com.cn/s/blog_52e8baa40100saen.html (2015-06-15, VHDL, 391KB, 下载2次)
active hdl 仿真vrack。。。。。。。
active hdl simulator vrack。。。。。。。。 (2014-07-30, VHDL, 4499KB, 下载33次)
无线通信qpsk调制键控移相调制(QPSK):调制效率高,要求传送途径的信噪比低,适合卫星广播。
The wireless communication phase shift keying modulation qpsk modulation (QPSK): high modulation efficiency of the transmission path low SNR required for satellite broadcasting. (2014-05-17, VHDL, 1KB, 下载6次)
verilog 开发实例 无线通 信网络
verilog examples of the development of wireless communication networks (2014-03-07, VHDL, 3KB, 下载5次)
关于8311的使用时序说明,设计注意事项,调试操作技巧
Timing instructions on the use of 8311, design considerations, debugging skills (2013-07-10, VHDL, 749KB, 下载2次)
是一本比较精炼但是很全面的Verilog语言教程
Is a more refined but very comprehensive Verilog language tutorial (2013-04-22, VHDL, 1013KB, 下载2次)
实 时 信 号 处 理 的 VHDL 代 码
VHDL code for real-time signal processing (2012-08-27, VHDL, 1588KB, 下载4次)
ppc接口顶层,用于fpga与ppc互通信
top of ppc interface for mutual communication of the fpga and ppc (2012-08-20, VHDL, 20KB, 下载5次)
为i2c mac代码,符合IIC协议相关的标准。
Code for the i2c mac meet IIC protocol-related standards. (2011-09-10, VHDL, 17KB, 下载6次)
I2C信號的原理與解碼,I2C时序,仿真图形
introducing of I2C interface (2011-08-11, VHDL, 331KB, 下载5次)
计数器的核心设计思想,仅仅提供参考,可以多变设计
Counter-core design, just for reference, the design can be varied (2011-07-31, VHDL, 55KB, 下载4次)
GPIO和SPI的基本核,请需要的下载,提出建议
GPIO and SPI basic core, please download the necessary, make recommendations (2011-07-31, VHDL, 2KB, 下载3次)
关于嵌入式系统设计的比较经典的教程,实用性强
Comparison of embedded system design on the classic tutorials, practical (2010-11-29, VHDL, 8820KB, 下载3次)
verilog黄金参考指南中文版,verilog推荐参考书
verilog golden reference guide , verilog recommended reference books (2010-10-20, VHDL, 458KB, 下载3次)
信噪比可变的加性高斯白噪声信道下信号发生器的VHDL语言编程实现
the realization of data-creater on AWGN channel (2010-10-14, VHDL, 68KB, 下载235次)
基于VHDL的数字时钟设计课件,简单,实用
VHDL-based Digital Clock Design Courseware (2010-01-11, VHDL, 265KB, 下载113次)
AsynchronousFIFOArchitectures,这篇经典FPGA-FIFO文章的中文版
AsynchronousFIFOArchitectures, this classic FPGA-FIFO Chinese version of the article (2009-12-18, VHDL, 533KB, 下载9次)
很好的verilog的中文教程,flash版
Very good tutorial verilog Chinese, flash version (2009-09-14, VHDL, 18078KB, 下载7次)