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按平台查找All Verilog(50) 

[其他] KeISEE

受学长学姐祖传报告恩惠,我也分享一些我上过的课的资料,包括一些通识课和ISEE的专业课。关键词:zju、浙江大学、信电、电科,
Thanks to the ancestral report of the seniors and sisters, I also shared some information about the courses I have taken, including some general education courses and professional courses of ISEE. Keywords: zju, Zhejiang University, ICT, CETC, (2023-07-02, Verilog, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1690087846715804.html

[VHDL/FPGA/Verilog] FPGA_Digital-modulation

基于FPGA的数字调制系统 :实现m序列作为信源,并通过按键来选择移位相加的初始值和步进值以及实现2ASK、2FSK、2PSK
FPGA based digital modulation system: implementing m sequence as the signal source and selecting the initial and step values of shift addition through buttons, as well as implementing 2ASK, 2FSK, 2PSK (2021-06-04, Verilog, 48KB, 下载0次)

http://www.pudn.com/Download/item/id/1622765518347992.html

[文章/文档] eetop.cn_AMBA总线规范-中文

AMBA(Advanced Microcontroller Bus Architecture)先进的微控制器总线架构是一个免费、开放的标准,用于SoC内部功能模块之间的互连和管理。对成功设计一个有大量控制器和外设的多核处理器有很大的帮助。AMBA标准是免费的,独立于平台可以在任何处理器架构上使用。AMBA的广泛使用使得其具有众多合作伙伴支持的强健的生态系统,为来自不同设计团队和厂商的IP组件之间提供兼容性和可扩展性的保障。
Advanced microcontroller bus architecture (AMBA) is a free and open standard for interconnection and management of functional modules in SOC. It is helpful to design a multi-core processor with lots of controllers and peripherals. The AMBA standard is free, platform independent and can be used on any processor architecture. The widespread use of AMBA enables it to have a robust ecosystem supported by many partners, which guarantees the compatibility and scalability of IP components from different design teams and vendors. (2020-08-29, Verilog, 1077KB, 下载1次)

http://www.pudn.com/Download/item/id/1598714732887631.html

[VHDL/FPGA/Verilog] FSK

产生15位的伪随机序列作为调制信号信源,采用频率选择法实现2FSK调制,采用鉴频法实现2FSK解调,可以仿真实现,也可使用示波器观测调制、解调信号。
A 15 bit pseudo-random sequence is generated as the source of the modulation signal. The 2FSK modulation is realized by the frequency selection method and the 2FSK demodulation is realized by the frequency discrimination method. It can be realized by simulation or by using an oscilloscope to observe the modulation and demodulation signals (2020-01-08, Verilog, 8676KB, 下载3次)

http://www.pudn.com/Download/item/id/1578471030238079.html

[VHDL/FPGA/Verilog] eetop.cn_专用集成电路设计实用教程

本书的主要对象是IC设计工程师,帮助他们解决IC设计和综合过程中遇到的实际问题。
The main object of this book is IC design engineers, to help them solve the practical problems encountered in IC design and integration. (2019-12-18, Verilog, 5352KB, 下载6次)

http://www.pudn.com/Download/item/id/1576628465117581.html

[其他书籍] eetop.cn_FPGA数字信号处理实现原理及方法

本书介绍基于FPGA实现数字信号处理的原理与方法,作为Xilinx公司相关课程的培训教材
The FPGA implementation of DSP principle & method. (2019-08-09, Verilog, 3789KB, 下载6次)

http://www.pudn.com/Download/item/id/1565321745656567.html

[嵌入式/单片机/硬件编程] eetop.cn_iic_slave

IIC从机模型,可综合RTL代码,经过了流片测试,绝对可靠。
IIC slave module,which is register transmit level code and can be synthesis.This design is tested by taped out and is reliable. (2019-05-09, Verilog, 589KB, 下载8次)

http://www.pudn.com/Download/item/id/1557384507788948.html

[Email服务器] tvyxruc

利用相应的信息技术以及互联网技术来协调企业与顾客间在销售、营销和服务上的交互
In order to improve the core competitiveness, the company uses the corresponding information technology and Internet technology to coordinate. (2018-10-20, Verilog, 2KB, 下载0次)

http://www.pudn.com/Download/item/id/1540009219561808.html

[其他] eetop.cn_uvm primer

UVM primer 中文翻译全文及全书配套代码
UVM primer The full text of Chinese translation and the complete code of the whole book (2018-04-21, Verilog, 4850KB, 下载32次)

http://www.pudn.com/Download/item/id/1524273066181550.html

[VHDL/FPGA/Verilog] eetop.cn_UVM

UVM 的 入门实例,一个完整的能够跑通的实例。其中包括DUT代码,Testbench代码,
UVM entry example, a complete example of running through. These include the DUT code, the Testbench code, (2017-07-18, Verilog, 2966KB, 下载13次)

http://www.pudn.com/Download/item/id/1500388560973167.html
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