对红外背景抑制技术进行了相关讨论和研究，在总结前人研究成果的基础
上，提出一种基于模式侧抑制的背景抑制方法。实验结果表明，该方法在有效增强
目标的同时，又能对复杂背景进行很好的抑制，在提高信杂比方面表现出良好的性
能。
The technique of background suppression in IR image is discussed and studied
principally. Based on the outcomes developed, an algorithm of small target detection
based on pattern lateral inhibition is proposed. Experiments results demonstrate the
approach proposed to be effective in detecting small target in clutter.
(2016-05-23, PDF, 774KB, 下载9次)
The H5TC4G43AFR-xxA, H5TC4G83AFR-xxA and H5TC4G63AFR-xxA are a 4Gb low power Double Data Rate
III (DDR3L) Synchronous DRAM, ideally suited for the main memory applications which requires large
memory density, high bandwidth and low power operation at 1.35V. DDR3L SDRAM provides backward
compatibility with the 1.5V DDR3 based environment without any changes. (Please refer to the SPD information
for details.)
SK hynix 4Gb DDR3L SDRAMs offer fully synchronous operations referenced to both rising and falling
edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling
edges of the CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling
edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth.
The H5TC4G43AFR-xxA, H5TC4G83AFR-xxA and H5TC4G63AFR-xxA are a 4Gb low power Double Data Rate
III (DDR3L) Synchronous DRAM, ideally suited for the main memory applications which requires large
memory density, high bandwidth and low power operation at 1.35V. DDR3L SDRAM provides backward
compatibility with the 1.5V DDR3 based environment without any changes. (Please refer to the SPD information
for details.)
SK hynix 4Gb DDR3L SDRAMs offer fully synchronous operations referenced to both rising and falling
edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling
edges of the CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling
edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth. (2015-10-21, PDF, 464KB, 下载1次)
AD7915/AD7916中文数据手册
AD7915/AD7916是16位、逐次逼近型模数转换器(ADC)，采用单电源VDD供电。 器件内置一个低功耗、高速、16位采样ADC和一个多功能串行接口端口。 在CNV上升沿，AD7915/AD7916对IN+与IN-引脚之间的电压差进行采样， 这两个引脚上的电压摆幅通常在0 V至VREF之间、相位相反。 基准电压(REF)由外部提供，并且可以独立于电源电压(VDD)进行设置。 功耗和吞吐速率呈线性变化关系。
AD7915/AD7916 Chinese Datasheet AD7915/AD7916 is a 16-bit successive approximation analog to digital converter (ADC), a single power supply VDD. It contains a low power, high speed, 16-bit sampling ADC and a versatile serial interface port. On the CNV rising edge, AD7915/AD7916 voltage difference between IN+ and IN- pin is sampled voltage swing these pins usually between 0 V to VREF, the opposite phase. A reference voltage (REF) is applied externally and can be independent of the supply voltage (VDD) settings. Power and throughput rate scales linearly. (2015-06-21, PDF, 916KB, 下载2次)
TDC-GP22 为TDC-GP21的下一代升级产品.这颗芯片是与TDC-GP21芯片100 管脚和功能兼容的芯片,而且带有更
强大的功能. 尤其这颗芯片的最新第一波检测功能,将使TDC-GP22非常适合于高动态范围的超声波水表的应
用.可编程的比较器offset调整范围增加到了 ± 35 mV ,而且这个比较器offset将会在第一波检测后自动回
到0点比较.测量第一个回波脉冲的相对宽度将会给用户一个对于接收信号强度的提示.通过这个提示信息可以
用于系统的长期覆盖物的信号减弱判断,以及用于气泡检测.多个测量脉冲的数据处理和数据读出功能将会比
TDC-GP21更加简单方便.
The next generation TDC-GP22 TDC-GP21 upgrade products. This chip is pin and function compatible chip and the TDC-GP21 chip 100 tube, and with more
Powerful functions. This chip detection function especially the latest first, will make the TDC-GP22 ultrasonic water meter is very suitable for high dynamic range should be
. comparator offset programmable adjustment range increased to 35 mV, and the comparator offset will automatically back in the first wave detection
To 0 points of comparison. Measure the first echo pulse relative width will give the user a for received signal strength by the prompt information can prompt.
A signal for long term covering system weakened judgment, as well as for bubble detection. A plurality of pulse measurement data processing and data read function will be greater than
TDC-GP21 is more simple and convenient. (2014-10-30, PDF, 5745KB, 下载49次)
研 究永磁 同步 电机 (P M SM )直 接 转 矩控制 (D T C ) 系统 。针 对传 统控 制 系统 中存 在 的 转 矩和 磁 链 脉 动 大 的 问题 ， 将 空 间 矢 量 调 制 (S V M ) 引入PM SM —D T C 系统 。通 过 对 永 磁 同 步 电机 数 学模型及 空 间 电 压 矢 量 调 制 算 法 的 分 析 ， 在 M atlab／Sim ulin k 环 境 下 ， 对 P M S M 的 S V M —D T C 系 统 进行仿 真 。仿 真 结果 表 明 ． 系统模 型具 有 很好 的 动静
态性能 。
In this paper， permanent magnet syn—
chronous motor ( PMSM ) direct torque contro1( DTC ) system was studied ．For inhibiting the rip
pie of torque and flux link age of traditional co ntrol
s y ste m s ， th e P M S M —D T C sy stem w a s co m b in e d
w ith the space vector modulation (SVM )． Based on
the study with the mathematical model of PMSM and SVM， and simulated the system in Matlab／Simulink．The system model has been proved reasonab le and effective with good dynamic and static performance． (2014-10-07, PDF, 236KB, 下载24次)
在数字电路的设计中,分频器是一种应用的十分广泛
的基本电路,他的具体功能就是对较高频率的信号进行分
频操作,目的是为了得到所需的较低频率的信号。
在实际的数字电路设计中,设计人员常需要得到占空
比为1∶n的n分频器,例如帧头信号或中断信号等。这
种分频器的设计思路如下:首先设计一个标准计数器,计
数器的模与分频系数相等 然后根据计数器电路的并行信
号输出来决定分频输出信号的高低电平,这样就可以完成
一个输出信号占空比为1∶n的n分频器。
In digital circuit design, the divider is a very wide range of basic circuit of an application specific functions of the higher frequency signal divider operation, the aim is to get the low-frequency signal. In practical digital circuit design, designers often need to be a duty cycle of 1: n-n-divider, such as the header signal or interrupt signals. This divider design ideas are as follows: First, to design a standard counter, the counter mode and frequency coefficient equal then decided to divide the output signal of the high and low based on the parallel signal output of the counter circuit, so that you can complete an output The signal duty cycle is 1: n, n divider. (2012-06-05, PDF, 153KB, 下载3次)
VS1003 是一个单片MP3/WMA/MIDI音频解码器和ADPCM编码器。它包含一个高性能，自主产权的低功
耗DSP 处理器核VS_DSP4,工作数据存储器，为用户应用提供5KB 的指令RAM 和0.5KB 的数据RAM。
串行的控制和数据接口，4 个常规用途的I/O 口，一个UART，也有一个高品质可变采样率的ADC和立体
声DAC，还有一个耳机放大器和地线缓冲器。
VS1003 is a single-chip MP3/WMA/MIDI ADPCM audio decoder and encoder. It contains a high performance, proprietary low-power
Consumption of DSP processor core VS_DSP4, working data memory, applications for the user instructions 5KB RAM and 0.5KB of data RAM.
Serial control and data interface, four general-purpose I/O port, a UART, there is a high-quality variable-sample rate and stereo ADC
Sound DAC, headphone amplifier and ground and a buffer.
(2011-04-03, PDF, 644KB, 下载5次)
视频图像是安防监控系统的重要信息来源，为现场发生的事件提供最重要的信
息和证据。而视频图像显示设备在显示和还原现场图像，供人员监视观看、及时发现现场的情
况中，起了关键的环节作用。实际中，应根据不同的环境要求，结合显示器的特点，选择不同
类型的显示设备，以达到最佳效果。
Video security monitoring system is an important source of information for on-site events to provide the most important information and evidence. The video image display device and restore the scene image in the display for the staff to monitor viewing, the scene to discover the case, played a key link role. Practice, should be based on different environmental requirements, combined with the characteristics of the display, choose different types of display devices, to achieve the best results. (2011-03-04, PDF, 737KB, 下载1次)
高速高分辨率CCD器件的实用化是近年图像采集领域的一个研究热点。选用科学级柯达
新型高分辨率可见光面阵CCD KA I- 0304设计了一种高速图像采集系统。该系统采用KSC - 100作为时序发生器驱动面阵CCD 和信号处理器AD9840A, 实现对CCD面阵输出模拟信号的高速A /D转换, 并将信号快速转存至片外SDRAM 存储器, 经USB 采集系统将数据发送到计算机。系统采用相关双采样( CDS)技术滤除信号中的相关噪声, 提高了系统的信噪比, 采集速度达40Mb it / s, 具有
集成度高、低噪声、数据传输速度快等特点。经测试, 系统工作稳定, 为高端科学级CCD面阵的实用化提供了一种设计方案。
The applicat ion of h igh speed and high reso lution CCD is a research ho tspot in im age ac
quisit ion fie ld. A high speed image acqu isition system is introduced and designed by using a new
high reso lution sc ientific leve l v isible light area CCD KA I- 0304. In the design, area CCD and signa l
processor AD9840A are driven by using KSC- 100 as the tim ing and driv ing c ircuit and then the
conversion o f h igh speed A /D for the CCD output o f analog signal is performed. The generated data
signa l is qu ickly transferred to ex terna l SDRAM m emory. Fina lly, data w ill be sent to a computer via
USB acqu isition system. Furthermo re, correlated double sampling( CDS) techno logy is adopted in the sys
tem to remove the relevant signa l no ise and the signal- to- no ise ration( SNR) is improved. The acqui
sition speed is up to 40Mbit/s. The system is featured by high integration, low no ise, h igh speed data
transm ission. A fter test ing, the s (2010-12-18, PDF, 253KB, 下载21次)
跟踪问题本质上是一个混合系统的状态估计问题[38】，即利用传感器的离散
观测来估计所感兴趣区域内目标个数和状态的过程，其中目标状态包括运动分量
(位置、速度、加速度)和属性信息(信噪比、谱特征，身份信息等)。目标跟
踪问题根据跟踪环境的不同可以分为单机动目标跟踪和多机动目标跟踪。
Tracking is essentially a hybrid system of the state estimation problem [38】, namely the use of sensors to estimate the discrete observation target region of interest number and status of the process, which includes movement component target state (position, velocity, acceleration) and attribute information (signal to noise ratio, spectral characteristics, status information, etc.). Target tracking problem based on tracking the environment can be divided into single-target tracking, and multi-target tracking. (2010-05-19, PDF, 483KB, 下载16次)
FM1702_1704_1705中文说明书
--非常详细的RC500或FM1702的中文数据手册
1. 概述. FM1702/1704/1705 是复旦微电子股份有限公司设计的基于ISO14443 标准的. 非接触卡读卡机专用芯片，采用0.6 微米CMOS EEPROM 工艺，支持13.56MHz. 频率下的typeA 非接触通信协议，支持多种加密算法，兼容Philips 的MF RC500 读卡机芯片.
FM1702_1704_1705 Chinese brochures-- very detailed RC500 or FM 1702 of a Chinese manual data. outlined. FM1702/1704/1705 of Fudan Microelectronics shares Limited design based on ISO14443 standards. Non-contact card reader ASIC. using 0.6 micron CMOS EEPROM process, support 13.56 MHz. typeA frequency of non-contact communication protocol, support for multiple encryption algorithm, compatibility of Philips MF RC500 chip card reader. (2007-06-18, PDF, 2032KB, 下载340次)