面试经验。摘自eetop,看看可能会有帮助。
Interview experience. From eetop (2019-01-18, VHDL, 118KB, 下载6次)
5 个ARM core HDL实现,设计的还不错
ARM core HDL implementation (2018-04-12, VHDL, 1125KB, 下载5次)
以太网通信verilo实现UDP、TCP传输。
ethernet verilog,udp,tcp (2016-12-23, VHDL, 6228KB, 下载16次)
基于verilog的DDS设计,内附代码,仿真环境等说明
the DDS design based on verilog (2015-07-14, VHDL, 3091KB, 下载13次)
FPGA 串口通信方法1 亲测能用,来自小桥流水的博客
FPGA Serial communication
http://blog.sina.com.cn/s/blog_52e8baa40100saen.html (2015-06-15, VHDL, 391KB, 下载2次)
关于8311的使用时序说明,设计注意事项,调试操作技巧
Timing instructions on the use of 8311, design considerations, debugging skills (2013-07-10, VHDL, 749KB, 下载2次)
是一本比较精炼但是很全面的Verilog语言教程
Is a more refined but very comprehensive Verilog language tutorial (2013-04-22, VHDL, 1013KB, 下载2次)
verilog code for bit stream adapters
verilog code for bit stream adapters (2012-10-29, VHDL, 101KB, 下载4次)
lattice Diamond平台的千兆以太网光纤接口与GMII接口的转换
lattice Diamond Platform of Gigabit Ethernet optical fiber interface and GMII interface conversion (2012-07-02, VHDL, 46KB, 下载38次)
为i2c mac代码,符合IIC协议相关的标准。
Code for the i2c mac meet IIC protocol-related standards. (2011-09-10, VHDL, 17KB, 下载6次)
计数器的核心设计思想,仅仅提供参考,可以多变设计
Counter-core design, just for reference, the design can be varied (2011-07-31, VHDL, 55KB, 下载4次)
GPIO和SPI的基本核,请需要的下载,提出建议
GPIO and SPI basic core, please download the necessary, make recommendations (2011-07-31, VHDL, 2KB, 下载3次)
关于嵌入式系统设计的比较经典的教程,实用性强
Comparison of embedded system design on the classic tutorials, practical (2010-11-29, VHDL, 8820KB, 下载3次)
利用SOPC Builder搭建三速率以太网基本构架,完成以太网功能。
SOPC Builder using the basic framework set up three speed Ethernet, Ethernet function to complete. (2010-07-30, VHDL, 36633KB, 下载71次)
用VHDL实现从以太网到并行数据以及从并行数据到以太网的HDLC成帧解帧.附详细代码说明,方便阅读.可方面移植到Altera及Xilinx等厂家芯片,是做基于FPGA的以太网设计的好资料
Achieved using VHDL and parallel data from the Ethernet to parallel data from the HDLC framing solution to Ethernet frames. Attached detailed code instructions, easy to read. Can be ported to Altera and Xilinx areas such as chip manufacturers are doing to FPGA-based very good information network design (2010-04-03, VHDL, 11KB, 下载205次)
基于VHDL的数字时钟设计课件,简单,实用
VHDL-based Digital Clock Design Courseware (2010-01-11, VHDL, 265KB, 下载113次)
AsynchronousFIFOArchitectures,这篇经典FPGA-FIFO文章的中文版
AsynchronousFIFOArchitectures, this classic FPGA-FIFO Chinese version of the article (2009-12-18, VHDL, 533KB, 下载9次)
基于verilog编写以太网激励程序源代码
Ethernet-based incentive program write verilog source code (2009-11-11, VHDL, 670KB, 下载24次)
很好的verilog的中文教程,flash版
Very good tutorial verilog Chinese, flash version (2009-09-14, VHDL, 18078KB, 下载7次)
以太网控制器MAC的verilog代码,已经过验证,可以用。
Ethernet Controller (2009-05-25, VHDL, 88KB, 下载20次)