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按分类查找All VHDL/FPGA/Verilog(701) 

[VHDL/FPGA/Verilog] nesfpga

任天堂娱乐系统的一种简单FPGA实现
A Simple FPGA Implementation of the Nintendo Entertainment System (2018-10-28, VHDL, 1217KB, 下载0次)

http://www.pudn.com/Download/item/id/1540662967304622.html

[VHDL/FPGA/Verilog] ethernet_loopback

通过FPGA驱动千兆以太网口,完成SPARTAN6上的UDP数据包闭环测试,即通过网口发送数据包到FPGA,FPGA内部将接收到的数据返回到PC机,建议测试之前添加ARP静态绑定,FGPA内部的IP以及MAC地址在ROM里的COE文档里可以看到,发送端添加了CRC以及整体CHECKSUM的计算
Driven by FPGA Gigabit Ethernet port, UDP SPARTAN6 data packet on the closed loop test, through the network to send data packets to FPGA, FPGA will receive the data back to the PC, the proposed test before adding ARP static binding, FGPA internal IP and MAC address in the COE document in the ROM where you can see, the sender adds CRC and CHECKSUM integral calculation (2017-11-20, Verilog, 23381KB, 下载43次)

http://www.pudn.com/Download/item/id/1511144498493064.html

[VHDL/FPGA/Verilog] pc_fpga_com_latest.tar

用VHDL实现的PC与FPGA之间的网络通信,通过以太网进行通信
comunicate between PC and FPGA via ethernet (2017-04-26, VHDL, 183KB, 下载6次)

http://www.pudn.com/Download/item/id/1493200804635958.html

[VHDL/FPGA/Verilog] my_alu

一个简单的ALU程序设计,实现以下功能: 逻辑运算:与、或、非、异或、逻辑左移、逻辑右移 算术运算:加、减
A simple ALU program designed to achieve the following functions: logic operations: AND, OR, NOT, XOR logical left, logical shift right arithmetic operations: addition, subtraction (2016-05-03, Others, 580KB, 下载1次)

http://www.pudn.com/Download/item/id/1462288970340513.html

[VHDL/FPGA/Verilog] eetop.cn_Product_Selection_Guide

Virtex-6 FPGA Configuration
Virtex-6 FPGA Configuration (2015-01-22, Unix_Linux, 2148KB, 下载1次)

http://www.pudn.com/Download/item/id/1421930988649952.html

[VHDL/FPGA/Verilog] Ethernet_Accel_Design

altera官方以太网例程(基于niosII)
Accelerating Nios II Ethernet Applications User Guide (2014-07-21, VHDL, 2593KB, 下载38次)

http://www.pudn.com/Download/item/id/2592643.html

[VHDL/FPGA/Verilog] rgmii.tar

以太网接口中的rgmii接口,FPGA VHDL源码
Ethernet interfaces rgmii interfaces, FPGA VHDL source code (2014-06-19, VHDL, 37KB, 下载52次)

http://www.pudn.com/Download/item/id/2570700.html

[VHDL/FPGA/Verilog] eetop.cn_fft

Hello, i have uploaded some interesting files ...
Hello, i have uploaded some interesting files ... (2014-03-07, VHDL, 156KB, 下载2次)

http://www.pudn.com/Download/item/id/2477265.html

[VHDL/FPGA/Verilog] ethernet-mac--VHDL

简易以太网测试仪,VHDL语言的,非常实用,有需要的可以看下
Simple Ethernet tester, VHDL language, very practical, need look (2013-02-27, VHDL, 15KB, 下载22次)

http://www.pudn.com/Download/item/id/2143006.html

[VHDL/FPGA/Verilog] greth_rx

以太网接受程序,用VHDL语言编写,调试通过
Ethernet acceptance procedure, using VHDL language, debugging through (2011-08-27, VHDL, 3KB, 下载8次)

http://www.pudn.com/Download/item/id/1632509.html

[VHDL/FPGA/Verilog] MACtop

基于FPGA的以太网控制器(MAC)源码,包括发送、接收、控制、CRC、寄存器、计数器等模块
Ethernet MAC sub-layer protocol (2011-05-01, VHDL, 125KB, 下载153次)

http://www.pudn.com/Download/item/id/1513154.html

[VHDL/FPGA/Verilog] MYPROJECT

芯片与FPGA的接口代码,实现以太网10兆的接口方案之源代码
CP2200 & FPGA (2010-10-10, VHDL, 245KB, 下载6次)

http://www.pudn.com/Download/item/id/1313791.html

[VHDL/FPGA/Verilog] ethernet_controller_Verilog

以太网控制器源码,verilog语言,包含MAC、MII接口
Ethernet controller ,include MAC and MII interfaces ,by verilog (2010-09-26, Visual C++, 70KB, 下载200次)

http://www.pudn.com/Download/item/id/1305143.html

[VHDL/FPGA/Verilog] ethernet_tri_mode

三态以太网的hdl源代码,适合FPGA工程师使用
Tri-State Ethernet hdl source code for FPGA engineers (2010-09-16, VHDL, 3039KB, 下载64次)

http://www.pudn.com/Download/item/id/1297318.html

[VHDL/FPGA/Verilog] 74LS04_cn

74hc04中文资料。。。。。。。。。。。。。。。。。。。。
74hc04 Chinese data. . . . . . . . . . . . . . . . . . . . (2010-08-19, Others, 75KB, 下载5次)

http://www.pudn.com/Download/item/id/1273244.html

[VHDL/FPGA/Verilog] m-mtip-10_100_1000_ethermac

10/100/1000M以太网MAC解决方案,是IP核的相关说明,利用ALTERA的FPGA设计,QUARTUS软件为开发平台。
10/100/1000M Ethernet MAC solution is the IP core instructions, using ALTERA' s FPGA design, QUARTUS software development platform. (2010-04-30, PDF, 42KB, 下载117次)

http://www.pudn.com/Download/item/id/1151329.html

[VHDL/FPGA/Verilog] HDLC_E1

E1到HDLC转换 实现E1到以太网 E1到HDLC转换 实现E1到以太网
E1 TO HDLC E1 TO ETHETH (2010-01-21, VHDL, 439KB, 下载161次)

http://www.pudn.com/Download/item/id/1046755.html

[VHDL/FPGA/Verilog] ethernet_example

FPGA上实现以太网 用VHDL实现,欢迎多交流
FPGA to achieve the realization of Ethernet using VHDL welcome more exchanges (2008-12-25, C/C++, 193KB, 下载71次)

http://www.pudn.com/Download/item/id/615902.html

[VHDL/FPGA/Verilog] Ethernet_verilog_ip_core

Ethernet(以太网)verilog ip core用verilogHDL语言写的以太网软核,对学习verilog语言和以太网有很大帮助。
Ethernet (Ethernet) verilog ip core language used verilogHDL Ethernet soft-core, learning Verilog language and Ethernet are very helpful. (2008-03-18, MultiPlatform, 882KB, 下载634次)

http://www.pudn.com/Download/item/id/418371.html

[VHDL/FPGA/Verilog] ethernet__verilog

fpga模拟以太网物理层的源代码,用verilog硬件描述语言开发。
FPGA simulation of the Ethernet physical layer of the source code, using Verilog hardware description language development. (2007-09-08, Others, 323KB, 下载307次)

http://www.pudn.com/Download/item/id/330183.html
总计:701