时间敏感性网络的中文简介，ECAT和TSN融合
Brief introduction of time sensitive network in Chinese, ECAT and TSN fusion (2020-09-26, VHDL, 837KB, 下载8次)
fpga与上位机arm及用户端等通信程序 网口调试
Debugging of FPGA network port (2017-09-02, VHDL, 7883KB, 下载5次)
基于xilinx 厂商的FPGA硬件的开发源代码，包括UART,SPI,以太网通信等等
The development of FPGA hardware based on xilinx manufacturers source code, including the UART, SPI, Ethernet communication and so on (2016-08-22, VHDL, 16724KB, 下载11次)
在xilinx用verilog实现工业以太网的全部文件
industrial ethernet in xilinx (2016-05-31, VHDL, 3294KB, 下载10次)
基于verilog语言的以太网接口的fpga实现，用在无线通信领域，供参考
The Ethernet interface based on verilog language fpga implementation, used in the field of wireless communications, for your reference (2015-09-21, VHDL, 24KB, 下载28次)
K7上实现以太网协议,实现udp/ip协议
Ethernet protocol K7 (2015-07-24, VHDL, 17845KB, 下载17次)
MAC协议的组网实现，用来在无线网中进行组网
Networking MAC protocol implementations (2014-12-04, VHDL, 10001KB, 下载2次)
FPGA控制DM9000A进行以太网数据收发的Verilog实现
FPGA control DM9000A Ethernet data transceiver Verilog realize (2014-07-28, VHDL, 2735KB, 下载41次)
三速以太网，仿真测试验证通过,VHDL编写，包含有说明文档和寄存器文档。
trimode ethernet (2014-04-08, VHDL, 6230KB, 下载53次)
FPGA 100M以太网UDP/IP收发
FPGA 100M Ethernet UDP/IP to send and receive (2014-01-16, VHDL, 2135KB, 下载109次)
reuse methodology manual for verification engineer
reuse methodology manual for verification engineer (2013-09-12, VHDL, 4598KB, 下载1次)
本文基于xilinx fpga ，v5,主要介绍如何用FPGA制作以太网
Based xilinx fpga, v5, describes how to use the FPGA making Ethernet (2013-01-23, VHDL, 2336KB, 下载139次)
XILINX的一个以太网例程，包含以太网内核的建立以及仿真过程，是XAPP443的例子
Routines of the XILINX a Ethernet, including Ethernet kernel establish and simulation process XAPP443 example (2013-01-10, VHDL, 9449KB, 下载19次)
一个典型的以太网的VHDL程序，非常有参考价值！！
A typical Ethernet VHDL program, a very valuable reference! ! (2012-11-12, VHDL, 878KB, 下载10次)
以太网芯片dm9000a测试，程序配置了DM9000a，使该芯片完成以太网口的数据发送。
The Ethernet chips DM9000A test, the program is configured DM9000a, allows the chip to complete the Ethernet port to send data. (2012-05-17, VHDL, 9372KB, 下载8次)
PLX公司 PCIE 接口芯片 PEX8311 PCB 板图，原文件格式我忘了，有导出的Protel99格式文件(有问题mail:wantaox@sina.com)
PLX PCIE interface chip PEX8311 PCB board map, have the export Protel99 format (mail: wantaox@sina.com) (2012-03-04, VHDL, 3876KB, 下载166次)
xilinx官网提供的VHDL,UART串行通信模块，肯定好用，官方提供
xilinx official website provides VHDL, UART, FPGA communication module is certainly easy to use, official (2011-08-29, VHDL, 10KB, 下载124次)
SDR SDRAM 控制器，Altera官网重要资料。内涵说明文档，和VHDL与Verilog两种设计IP。
SDR SDRAM controller from Altera (2011-08-28, VHDL, 2305KB, 下载113次)
MII接口编程,用于收发以太网MAC帧的FPGA实现。
MII interface programming, send and receive Ethernet MAC frame for the FPGA. (2011-04-27, VHDL, 3KB, 下载111次)
清华大学sdr项目，网口代码。Verilog编写。很实用。希望大家喜欢。
Tsinghua University sdr project, network interface code. Verilog preparation. Very practical. Hope you like it. (2010-09-26, VHDL, 4KB, 下载113次)