一款电力系统上用的硬件编程代码，在平台上调试成功了，可作为新手入门学习用！
A power system with hardware programming code, debugging on the platform successfully, can be used as a novice learning! (2021-04-11, VHDL, 628KB, 下载0次)
基于VHDL语言编写的EDA程序，可试小时分秒的自动进位，也可手动调时。
Based on Automatic carry EDA VHDL language program, you can try hour, minute and second, you can manually adjust the time. (2015-07-28, VHDL, 9522KB, 下载3次)
VGA点阵概念，就是用单片机的点阵概念，玩FPGA
VGA dot matrix concept, the concept is to use lattice microcontroller, FPGA Play (2015-07-07, VHDL, 3142KB, 下载4次)
AT24CX的中文资料文件,适合玩51单片机的朋友们.
AT24CX Chinese data files for playing 51 single friends. (2014-01-16, VHDL, 422KB, 下载2次)
电子赌博机，可以多人一起玩，支持一键复位和其他功能
Electronic gambling machines, people can play together, support a reset button and other features (2013-12-14, VHDL, 2KB, 下载1次)
用Verilog实现简单的串口通信，经过功能仿真和板上调试，接收和发送模块均无问题
Using Verilog realize a simple serial communication, through functional simulation and on-board debugging, had no problems receiving and sending module (2013-11-13, VHDL, 3KB, 下载4次)
玩转FPGA，Altera创新大赛的感言，很多经验在里面！
Fun FPGA, Altera Innovation Competition reflections, a lot of experience in there! (2013-09-20, VHDL, 2364KB, 下载2次)
深入浅出玩转+FPGA的清晰版，学习fpga的好资料
Fun+FPGA layman clear version, learning good information fpga (2013-09-19, VHDL, 28680KB, 下载9次)
深入浅出玩转FPGA一书的基础实验源代码，采用Verilog描述
FPGA source code (2013-05-24, VHDL, 2706KB, 下载9次)
基于Verilog的分频计数源代码，配合深入浅出玩转FPGA一书的实验2使用。
Verilog-based division counting source code (2013-05-24, VHDL, 164KB, 下载2次)
基于DE2-115板子的IR控制器（给予VHDL语言，已在板子上调试通过，可以直接使用）！
DE2-115 board IR controller (given VHDL language, has been on the board through debugging, can be used directly)! (2013-01-01, VHDL, 5757KB, 下载11次)
特权同学书籍《深入浅出玩转FPGA》的源码
Privileged students books layman Fun FPGA source (2012-12-15, VHDL, 7383KB, 下载57次)
深入浅出玩转FPGA一书中实验中的串口读写实验
Fun FPGA simple terms, a book to read and write from serial com. (2012-04-03, VHDL, 367KB, 下载18次)
fpga中实现简单的led灯控制，包括流水灯等一系列的程序，帮你玩转led
led control (2012-03-26, VHDL, 1613KB, 下载8次)
FPGA玩转Altera之时序篇，包括时序分析注意事项
Altera play the FPGA XuPian, including timing analysis the matters needing attention (2012-02-05, VHDL, 16351KB, 下载10次)
斯坦福大学的netfpga最新源代码开发包，用于开发网络路由器交换机等
Stanford University netfpga the latest source code development kit for developing network switches routers (2011-10-16, VHDL, 5551KB, 下载108次)
深入浅出玩转FPGA代码 实验9sdram模块 基于EP1C3
Layman Fun FPGA code module based on experimental 9sdram EP1C3 (2011-09-17, VHDL, 2251KB, 下载23次)
用VHDL写的带有小时，分钟，秒的电子钟，已在FPGA开发板上调试运行过，显示very well!
Written in VHDL, with the hours, minutes, seconds, the electronic clock has been running in the FPGA development board debugger before, show very well! (2009-12-08, VHDL, 1KB, 下载4次)
游戏玩家通过控制PS/2键盘上的方向键，当键盘中的方向键被按下，判断是否为有效位置，因为并不是所以的位置都是有效位置。当确定为有效位置时，开始显示游戏玩家的新位置，同时当按键被按下时，启动计时模块，计算游戏玩家玩游戏的时间。当游戏玩家运动到出口时，停止计时，锁定游戏时间，直到下次游戏的开始。
Gamer by controlling the PS/2 keyboard arrow keys, when the direction of the keyboard keys are pressed, to determine whether the location for the effective, because they are not the location so the location is valid. When the site was identified as an effective, gamers started to show the new location, at the same time when the button is pressed, the start timing module, gamers play games computing time. When the game players to export movement, stop the clock, the time the game locked until the beginning of the next game. (2009-05-19, VHDL, 1498KB, 下载14次)
FPGA的uart控制器的verilog源程序，在cyclone II EP2C8Q208上调试运行成功
FPGA s UART controller Verilog source code, in cyclone II EP2C8Q208 debugging run successfully (2008-11-17, VHDL, 54KB, 下载18次)