FPGA 1Gbps以太网与UDP数据传输芯片评估
FPGA 1Gbps ETHERNET With UDP Data Transfer for Chip Evaluation (2020-05-24, SystemVerilog, 18219KB, 下载0次)
基于FPGA的10Gbit灵活可扩展以太网流量生成器
10 Gbit s flexible and extensible Ethernet FPGA-based traffic generator (2014-10-03, VHDL, 86KB, 下载0次)
用于Digilent Nexys 4 DDR FPGA的以太网MAC。
Ethernet MAC for the Digilent Nexys 4 DDR FPGA. (2018-08-21, Verilog, 36KB, 下载0次)
用于在FPGA上模拟晶体管级网表的工具
Tools for emulating transistor-level netlists on FPGAs (2011-04-02, JavaScript, 16610KB, 下载0次)
基于RMII接口的实时以太网通信的FPGA实现
FPGA implementation of Real-time Ethernet communication using RMII Interface (2014-09-18, Verilog, 265KB, 下载1次)
用于10G以太网的PTPv2硬件引擎设计,Verilog HDL描述
Design of PTPv2 hardware engine for 10G Ethernet, described by Verilog HDL (2023-05-30, C++, 691KB, 下载0次)
一个基于Python的网表解析器，包括Verilog和SPICE
A Python based netlist parser, including Verilog and SPICE (2015-07-24, Python, 52KB, 下载0次)
用于查询Verilog网表的库和命令行工具。
A library and command-line tool for querying a Verilog netlist. (2022-06-13, C++, 327KB, 下载0次)
三态千兆网的fpga说明书，英文的，原汁原味
FPGA specification of three state gigabit network, English, original (2020-03-29, C/C++, 1583KB, 下载0次)
alteral的千兆网资料说明手册，分享给大家，呵呵
Alternate's Gigabyte data manual, share it with you (2020-03-29, C/C++, 2591KB, 下载0次)
基于FPGA，硬件平台：ALINX与PANGO合作的PGL22G开发板、AD9280模块，软件平台：PDS。描述语言：verilog。AD9280以太网传输例程。
Based on FPGA, hardware platform: pgl22g development board, ad9280 module cooperated by alinx and Pango, software platform: PDs. Description Language: Verilog. Ad9280 Ethernet transmission routine. (2019-11-19, Verilog, 14343KB, 下载1次)
pll 动态从配置锁相环时钟输出，为官网demo
pll reconfig xilinx vivado (2018-01-09, Vivado, 17KB, 下载10次)
以太网PHY层中的组成部分 8B10B编码器
Part of the Ethernet PHY layer in 8B10B encoder
(2015-01-13, VHDL, 2KB, 下载20次)
本书首先介绍了 FPGA 的相关基础知识，然后分别通过7 个在实际工程应用中的案例详细介绍了通过FPGA 实现I2C 协议要求的接口、UART 控制器、USB 接口控制器、数字视频信号处理器、VGA/LCD 显示控制器、CAN 总线控器、以太网控制器的方法。本书所介绍的案例立足于工程实践，符合实际应用中的开发过程，在案例介绍过程中结合作者大量的开发经验。
This book introduces the basic knowledge of FPGA, and then were through 7 in the case of practical engineering applications described in detail through the FPGA I2C protocol required interface, UART controller, USB interface controller, a digital video signal processor, VGA/LCD display controller, CAN bus controller, ethernet controller. Cases presented in this book based on the engineering practice, in line with the practical application of the development process, the process described in the case of a large number of development experience combined. (2013-07-23, VHDL, 5045KB, 下载59次)
两个IP113S芯片的网管通信，寄存器的读写操作
Two IP113S chip communication network, register read and write operations (2013-06-06, C/C++, 2KB, 下载2次)
alter公司开发板经典例程，其中主要内容是HDL-IP的例程，里面有串口、flash、以太网口设置初始化等等。
alter corporate development board classic routines, principal among which is the routine of HDL-IP, there are serial flash, Ethernet port setting initialization. (2012-08-28, VHDL, 195KB, 下载11次)
Demo program for developing a TV box using Altera DE2-115 board
Demo program for developing a TV box using Altera DE2-115 board (2011-11-23, Others, 723KB, 下载14次)
在AVNET的V4FX12开发板上使用MB实现网络的例子，可作为千兆网开发或者其他使用Xilinx芯片的朋友参考。
AVNET board in the development of V4FX12 example of using the MB network can be developed as Gigabit Ethernet or other friends using Xilinx chip reference. (2011-07-02, VHDL, 1462KB, 下载18次)
交通灯 VHDL源码 功能实现 外网摘写
VHDL source function realization of traffic lights outside the network Zhai write (2009-12-27, VHDL, 1KB, 下载6次)
目前以太网PHY芯片是通过总线MDC/MDIO，但是基本上是通过MAC芯片直接管理的，本代码实现了通过FPGA管理PHY。即由FPGA完成MII管理
At present, Ethernet PHY chip through the bus MDC/MDIO, but basically through the direct management of MAC chip, the code through the FPGA implementation management PHY. FPGA completed by the MII management (2009-03-12, VHDL, 2KB, 下载509次)