游戏共有两人，分别为甲方和乙方，按下键表示发球。在发球后，发球方最近的一位LED点亮，亮的灯依次向对方移动（如甲发球，则LED灯从左向右移动），当到达对方最后一位之前对方必须按下按键表示接球，接球后LED灯向对方移动，否则对方计一分。在球到达中间的网之前接球时，也视为接球失败，对方计一分，率先加到11分者游戏胜出。
There are two players in the game, Party A and Party B. press the key to serve. After the service, the nearest LED of the server lights up and moves to the other side in turn (for example, if a serves, the LED moves from left to right). Before reaching the last position of the other side, the other side must press the key to receive the ball. After receiving the ball, the LED moves to the other side, otherwise the other side counts one point. When catching the ball before it reaches the middle net, it is also regarded as a failure. The opponent counts one point, and the first one to add to 11 points wins the game. (2021-04-08, Others, 1KB, 下载0次)
《开源软核处理器OpenRisc的SOPC设计》介绍基于源代码开放的OpenRisc1200（以下简称OR1200）软核处理器的SOPC设计方法。《开源软核处理器OpenRisc的SOPC设计》分为两部分，第一部分介绍OR1200软核处理器的架构和配置、Wishbone总线的标准及OR1200软核处理器软硬件开发环境的建立；第二部分以具体实例说明如何使用OR1200软核处理器完成嵌入式设计，其中包括：调试接口的实现、OR1200控制片内存储器和I／O、串口、SDRAM、外部总线、以太网、LCD及SRAM；另外还介绍如何在OR1200上运行嵌入式Linux，并针对第二部分给出部分源代码。
《开源软核处理器OpenRisc的SOPC设计》适合对SOPC或OR1200软核处理器感兴趣的初学者使用，也可作为嵌入式系统设计人员的自学用书，或作为相关专业研究生的教材和教师的教学参考书。
Open source processor design method based on openriscor1200. The SOPC design of open source soft core processor openrisc is divided into two parts. The first part introduces the architecture and configuration of or1200 soft core processor, wishbone bus standard and the establishment of software and hardware development environment of or1200 soft core processor. The second part describes how to use or1200 soft core processor to complete embedded design with specific examples, including the implementation of debugging interface and or1200 control In addition, it introduces how to run embedded Linux on or1200, and gives some source codes for the second part.
SOPC design of open source soft core processor openrisc is suitable for beginners who are interested in SOPC or or1200 soft core processor. It can also be used as a self-study book for embedded system designers, or as a teaching reference book for graduate students and teachers. (2020-10-27, Verilog, 11722KB, 下载3次)
Nexys 4 DDR是一款Digilent多孔RAM-based Nexys开发板的简易替代品。搭载Xilinx?Artix?-7 FPGA芯片，Nexys 4 DDR是一个打开即用型的数字电路开发平台，帮助使用者能够在课堂环境下实现诸多工业领域的应用。相比早期版本，经优化后的Artix-7 FPGA芯片能够实现更高性能的逻辑，并且能提供更多的容量，更好的性能以及更丰富的资源。配有高容量的大型FPGA芯片（Xilinx产品编号XC7A100T-1CSG324C）并集成了USB，以太网和其它端口，Nexys 4 DDR开发板能实现从理论型组合电路到强大的嵌入式处理器的多种设计。几个内置的外设：包括一个加速度计，一个温度传感器，微机电系统数字麦克风，扩音器和大量的I/O设备使Nexys 4 DDR在不需要任何其它组件的情况下就能满足广泛的设计需求。
Nexys 4 DDR is a simple alternative to Digilent porous RAM based nexys development board. With Xilinx artix Gamma -7 FPGA chip, nexys 4 DDR is a ready to use digital circuit development platform, which helps users to realize many industrial applications in the classroom environment. Compared with earlier versions, the optimized artix-7 FPGA chip can achieve higher performance logic, and provide more capacity, better performance and more resources. Equipped with a large FPGA chip with high capacity (Xilinx product number xc7a100t-1csg324c) and integrated with USB, Ethernet and other ports, the nexys 4 DDR development board can realize a variety of designs from theoretical combined circuit to powerful embedded processor. (2020-03-20, C/C++, 2217KB, 下载4次)
曼彻斯特编码（Manchester Encoding），也叫做相位编码（ Phase Encode，简写PE），是一个同步时钟编码技术，被物理层使用来编码一个同步位流的时钟和数据。它在以太网媒介系统中的应用属于数据通信中的两种位同步方法里的自同步法（另一种是外同步法），即接收方利用包含有同步信号的特殊编码从信号自身提取同步信号来锁定自己的时钟脉冲频率，达到同步目的。
Manchester Encoding, also known as Phase Encode (PE), is a synchronous clock encoding technique used by the physical layer to encode the clock and data of a synchronous bit stream. Its application in the Ethernet media system belongs to the self-synchronization method in the two bit synchronization methods in data communication (the other is the external synchronization method), that is, the receiver extracts the synchronization from the signal itself by using the special code containing the synchronization signal. The signal is used to lock its own clock frequency for synchronization purposes. (2018-11-09, C/C++, 320KB, 下载0次)
altium designer 常用库大全，包含3D库
the most popular lib about altium designer which includes the 3d lib, pcb lib and sch lib (2018-01-01, WINDOWS, 31446KB, 下载138次)
LPC4357开发板采用ARM的Cortex-M4微控制器LPC4357。内置一个ARM Cortex-M0协处理，CPU运行频率高达204MHz，片内集成1MB Flash和36KB SRAM。开发板采用独立核心板设计，核心板集成64MB SDRAM、128MB NAND-Flash、4MB SPI-Flash。核心板上的摄像头接口可直接连接各种型号的摄像头，两侧160P排针接口引出了除EMC总线外的LPC4357芯片所有功能管脚。
开发板提供丰富的外设接口，包括以太网、液晶屏、摄像头、USB-Host、USB-OTG、SD卡、RS232、RS485、CAN、耳机、麦克风、温度传感器、AD/DA、JTAG仿真器等。此外，开发板提供一个14P扩展接口，包括1路UART、1路SPI、1路I2C、4个IO、3.3V、5V，可以很方便的扩展自己的外围电路。
DS-LPC4357 development board using the Cortex-M4 microcontroller LPC4357 ARM s. A built-in ARM Cortex-M0 co-processor, CPU operating frequency up to 204MHz, 1MB Flash and 136KB SRAM integrated on chip.
Development board using an independent core board design, the core board integrates 64MB SDRAM, 128MB NAND-Flash, 4MB SPI-Flash. Camera core board interface can be directly connected to various types of cameras, both sides 160P pin interface leads to the outside of the bus in addition to EMC LPC4357 chip all the functions of the pins.
Development board provides a rich set of peripheral interfaces, including Ethernet, LCD screen, camera, USB-Host, USB-OTG, SD card, RS232, RS485, CAN, headphone, microphone, temperature sensor, AD/DA, JTAG emulator, etc. . In addition, the development board provides a 14P expansion interfaces, including one-way UART, 1 road SPI, 1 channel I2C, 4 个 IO, 3.3V, 5V, can easily expand their peripheral circuits. (2016-02-23, C/C++, 2197KB, 下载4次)
“\Example-s5-1\des” 目录下为设计工程，其设计输入采用Synplify预先编译好的.vqm网表
“\Example-s5-1\source”目录下为设计的源代码，这里只给出了Verilog语言实例，仅供读者参考
“\Example-s5-1\source \area_opt”目录下为面积优化的代码
“\Example-s5-1\source \perf_opt”目录下为性能优化的代码
“\Example-s5-1\source \common”目录下是共用的代码
Under \ Example-s5-1 \ des directory for design engineering, the design input using Synplify precompiled .vqm netlist
\ Example-s5-1 \ source directory for the design of the source code, just to give examples of Verilog language, reference work
\ Example-s5-1 \ source \ area_opt directory for the area-optimized code
Under \ Example-s5-1 \ source \ perf_opt directory for performance-optimized code
Under the \ Example-s5-1 \ source \ common directory is shared code (2015-03-09, VHDL, 124KB, 下载5次)
程序为温度报警系统，功能如下：
1. 显示当前时间和温度，时间显示采用实时时钟，掉电后时钟继续工作；
2. 可以通过外部键盘设置温度的上限值和下限值，温度超过上限值和下限值分别报警，并有声光指示；
3. 报警后记录当前温度和时间，并保存到EEPROM，每5分钟最多报警一次，报警记录要求能够查询；
Procedures for the temperature alarm system, functions as follows: 1. Displays the current time and temperature, time display real-time clock, the clock continues to operate after power 2 external keyboard can set the temperature of the upper limit and lower limit, the temperature exceeds the upper alarm limit and lower limit, respectively, and a sound and light indication 3 alarm record the current temperature and time, and saved to EEPROM, once every 5 minutes up to an alarm, the alarm recording requires the ability to query (2013-08-20, Asm, 7KB, 下载5次)
使用vhdl语言设计的乒乓球比赛游戏机，一个由甲乙双方参赛，有裁判的三人乒乓球游戏机。用8个发光二极管代表乒乓球台，中间两个发光二极管兼做乒乓球网，两边各代表参赛双方的位置，用点亮二极管按照一定方向移动来表示球的运动。在游戏机的两侧各设置两个开关，一个是发球开关（af，bf），另一个是击球开关（aj，bj）。甲乙二人按乒乓球比赛的规则来操作开关。
点亮，代表乒乓球在移动。比赛一直进行到一方几分为11分，该局结束，记分牌清零，可以开始新的一局比赛。
Using VHDL language design table tennis game consoles, a competition by both parties, the referee of three table tennis game. Double as a table tennis net with eight light-emitting diodes on behalf of a ping-pong table, in the middle of two light-emitting diodes, on both sides of the representatives participating both lit diode according to a certain direction to move to represent the movement of the ball. Setting two switches, each on both sides of the ride is a tee switch (af, bf), another is batting switch (aj, bj). B two table tennis competition rules to operate the switch. On behalf of table tennis in mobile. The game has been carried out to the party a bit for 11 minutes it ends scoreboard is cleared, you can start a new innings. (2012-09-09, VHDL, 481KB, 下载9次)
随着多微机系统的应用和微机网络的发展，通信功能越来越显得重要。串行通信是在一根传输线上一位一位地传送信息.这根线既作数据线又作联络线。串行通信作为一种主要的通信方式，由于所用的传输线少，并且可以借助现存的电话网进行信息传送，因此特别适合于远距离传送。在串行传输中，通信双方都按通信协议进行，所谓通信协议是指通信双方的一种约定。约定对数据格式、同步方式、传送速度、传送步骤、纠错方式以及控制字符定义等问题做出统一规定，通信双方必须共同遵守。
With the application of multi-microcomputer systems and computer networks, communication becomes less important. Serial communication is a one in a transmission line to transmit information, which lines both for the data line and make contact line. Serial communication as a primary means of communication, since the transmission line with less, and can make use of existing telephone network for information transmission, it is particularly suitable for long-distance transmission. In serial transmission, the communication protocol for communication by both sides, the so-called communication protocol is an agreement the two sides. Agreement on data formats, synchronization, transmission speed, transmission procedures, error correction, and control characters are defined to make uniform provisions and other issues, communication, both parties must abide by. (2011-11-01, VHDL, 1KB, 下载2次)
摘 要： 可编程片上系统设计是一个崭新的、富有生机的嵌入式系统设计技术研究方向。本文在阐述可编程逻辑器件特点及其发展趋势的基础上，探讨了智力产权复用理念、基于嵌入式处理器内核和xilinx FPGA的SOPC软硬件设计技术，引入了基于英特网可重构逻辑概念并提出了设计实现方法，为基于FPGA的嵌入式系统设计提供了广阔的思路。
Abstract: Programmable System on Chip design is a new and vibrant direction of embedded system design technology. This paper describes the development of programmable logic device characteristics and trends, based on the reuse of intellectual property rights concept, based on xilinx FPGA embedded processor core and the SOPC hardware and software design techniques, the introduction of Internet-based reconfigurable logic Design concept and implementation method is proposed for FPGA-based embedded system design provides a broad way of thinking. (2011-04-14, Unix_Linux, 65KB, 下载7次)
本系统设计利用FPGA设计了一个接在电脑串口上的一个DMX512协议的转接卡，它可以让你的电脑变成一台超强的电脑灯控制台或者调光台、LED控制器等。通过电脑软件，可以控制电脑灯或者其他DMX512协议的设备，比如LED灯、激光灯、PAR灯、DJ设备等等。
本系统还有体积小巧携带方便等特点，足够一般的娱乐场所、多功能厅、会议厅等场所使用，同时采用电脑进行灯光的控制，也可以提升工程的技术含量，显得更高科技。通过简单更改DMX模块的UART部分，还可以将串口转换usb接口，不过由于手头上的FPGA开发板没有USB接口，所以使用UART接口进行测试。
The system design using FPGA, a serial port on the computer then a DMX512 protocol adapter, it can make your computer into a super computer console or lighting console lights, LED controller. Through computer software, can control lights or other DMX512 protocol computer equipment, such as LED lights, laser lights, PAR lamps, DJ equipment. The system also features compact, portable and so on, is sufficient for most of the entertainment, function rooms, conference rooms and other places to use, while using computer control of lighting can also enhance the project s technical content, appears to higher technology. DMX module by simply changing the UART portion can also convert usb serial interface, however, because the FPGA development board on hand no USB interface, so tests using the UART interface.
(2010-07-11, VHDL, 2171KB, 下载270次)
两人乒乓球游戏机是用9个发光二极管代表乒乓球台，用点亮的发光二极管按一定的方向移动来表示球的运动。在游戏机的两侧各设置一个开关，即击球开关Hit A，HitB。甲乙二人按乒乓球比赛规则来操作开关。当甲按动击球开关时，靠近甲的第一个二极管亮，然后发光二极管由甲向乙依次点亮，代表乒乓球的移动。当球过网（中点）时，乙方可以击球。若乙方提前或是没击中球则判乙方失分，甲方的计分牌自动加分。然后重新发球，比赛继续。比赛直到一方分数达到11分时，比赛结束。
Two table tennis game with nine leds with light table tennis, representing the light emitting diode according to certain direction to move the ball movement. On both sides of the game to set A switch, namely the ball Hit A HitB, switch. 2 party b according to table tennis match rules switch. When a button when hitting switch near the first light emitting diode, then led by a to b, in light of the table tennis movement. Representative When the ball over the net (middle), party b can hit. If party b or didn t hit the ball ahead is sentenced to party b, party a s scoreboards automatic points. Then again, continue to serve. Until one reaches 11 points, the end of the match. (2010-06-28, VHDL, 4KB, 下载14次)
本帖最后由 NovaCao 于 1-18-2009 18:02 编辑
使用Quartus II进行仿真
QQ：44425312
QQ群：50585234（群名称：FPGA4u）
gtalk：fpgaforu@gmail.com
网站：www.fpga4u.com
淘宝网店：http://shop34914329.taobao.com/
我们以一个计数器为例，在QuartusII中对其进行仿真。
打开Quartus II，新建一个工程，新建Verilog HDL文件
This quote was last NovaCao on 1-18-2009 18:02 by editing the use of Quartus II simulation QQ: 44425312 QQ Group: 50,585,234 (group name: FPGA4u) gtalk: fpgaforu@gmail.com Website: www.fpga4u.com Taobao shop : http://shop34914329.taobao.com/ us to a counter example, in QuartusII in its simulation. Open the Quartus II, create a new project, the new Verilog HDL files (2009-11-07, VHDL, 5KB, 下载2次)
本帖最后由 NovaCao 于 1-18-2009 18:02 编辑
使用Quartus II进行仿真
QQ：44425312
QQ群：50585234（群名称：FPGA4u）
gtalk：fpgaforu@gmail.com
网站：www.fpga4u.com
淘宝网店：http://shop34914329.taobao.com/
我们以一个计数器为例，在QuartusII中对其进行仿真。
打开Quartus II，新建一个工程，新建Verilog HDL文件
This quote was last NovaCao on 1-18-2009 18:02 by editing the use of Quartus II simulation QQ: 44425312 QQ Group: 50,585,234 (group name: FPGA4u) gtalk: fpgaforu@gmail.com Website: www.fpga4u.com Taobao shop : http://shop34914329.taobao.com/ us to a counter example, in QuartusII in its simulation. Open the Quartus II, create a new project, the new Verilog HDL files (2009-11-07, VHDL, 5KB, 下载11次)
我们小组共了一个月做的DDS,程序核心用的是Verilog HDL,有仿真波形,输出正弦波,方波,及三角波,步进可调.频率范围1HZ--10MHZ
Our group for a month to do a total of DDS, the procedure is used in the core of Verilog HDL, there are simulation waveform, the output sine wave, square wave and triangular wave, step adjustable. Frequency range 1HZ- 10MHZ (2009-08-03, VHDL, 115KB, 下载846次)
进行了一个8位CISC处理器的设计与实现，该微处理器含有计算机基本的功能模块，并对存储器进行了层次化设计。指令系统中的指令分为四大类共十六条，其中包括算术逻辑指令、I/O指令、访存、转移指令和停机指令。在处理器的实现过程中,首先给出了数据通路结构,然后采用VerilogHDL进行硬件电路描述,并对每一个模块进行功能仿真以验证设计的正确性。最后对整个处理器执行程序进行指令验证,并得到综合后的网表。
Conducted an 8-bit CISC processor design and implementation, the microprocessor contains the basic functions of a computer module, and a hierarchical memory design. Instructions in the instruction set is divided into four main categories of a total of 16, including the arithmetic logic instruction, I/O instructions, visit survive the transfer of command and shutdown command. In the processor to achieve the process, first of all, given the structure of the data path, and then the use of hardware circuits VerilogHDL description of each function of a simulation module to verify the correctness of the design. Finally, the entire processor command to verify the implementation of procedures, and comprehensive post-netlist. (2009-07-07, VHDL, 506KB, 下载21次)
设计一个乒乓球游戏机，该机模拟乒乓球比赛的基本过程和规则，并能自动裁判和计分。
1、 使用乒乓球游戏机的甲乙双方各在不同的位置发球或击球。
2、 乒乓球的位置和移动方向有灯亮及依次点燃的方向决定，球移动的速度为0.1~0.5S移动一位。使用者根据球的位置发出相应的动作，提前击球或出界均判失分。设计者可按过网击球来设计，也可按乒乓球移动到对方第二盏灯亮后方可击球来设计。
3、 比赛用21分为一局来进行，甲乙双方都应设置各自的计分牌，任何一方先计满21分，该方就算赢了此局。当计分牌清零后，又可开始新的一局比赛。
The design of a table tennis game, it' s the basic table tennis simulation process and the rules and referees and scoring automatically. (2009-05-23, VHDL, 1KB, 下载47次)
设计四 拔河游戏机
1、 设计一个能进行拔河游戏的电路。
2、 电路使用15个(或9个)发光二极管，开机后只有中间一个发亮，此即拔河的中心点。
3、 游戏双方各持一个按钮，迅速地、不断地按动，产生脉冲，谁按得快，亮点就向谁的方向移动，每按一次，亮点移动一次。
4、 亮点移到任一方终端二极管时，这一方就获胜，此时双方按钮均无作用，输出保持，只有复位后才使亮点恢复到中心。
5、 用数码管显示获胜者的盘数。
教学提示:
1、 按钮信号即输入的脉冲信号，每按一次按钮都应能进行有效的计数。
2、 用可逆计数器的加、减计数输入端分别接受两路脉冲信号，可逆计数器原始输出状态为0000，经译码器输出，使中间一只二极管发亮。
3、 当计数器进行加法计数时，亮点向右移；进行减法计数时，亮点向左移。
4、 由一个控制电路指示谁胜谁负，当亮点移到任一方终端时，由控制电路产生一个信号，使计数器停止计数。
5、 将双方终端二极管“点亮”信号分别接两个计数器的“使能”端，当一方取胜时，相应的计数器进行一次计数，这样得到双方取胜次数的显示。
6、 设置一个“复位”按钮，使亮点回到中心，取胜计数器也要设置一个“复位”按钮，使之能清零。
design a tug-of-war game, can design a game of tug of war circuit. 2, circuit use 15 (or 9), light-emitting diodes, come only among a shiny, namely, the center of tug-of-war. 3, the game with a two button rapidly and continuously pressed, have a pulse, who by fast, Who bright spots on the move, every time, a bright spot in Mobile. 4, the party moved to highlight terminal diode, on the winning side, this time the two sides had no effect buttons, to maintain output, so after only bright spot reduction restored to the center. 5, digital Display won the bookkeeping. Teaching Tip : one, that the button signal input pulse signal every time the button should be able to effectively counter. 2, with reversible counter, plus or minus count input to receive two pulse signal, reversible counter to the (2006-05-23, Java, 286KB, 下载89次)
经典VHDL 的实例程序，共44个！要下载的尽快
classic examples of VHDL, with a total of 44! To download as soon as possible (2005-12-11, C/C++, 42KB, 下载10827次)