Digilent FPGA平台，用于在vivado中便捷修改管脚xdc约束文件。
也可以去digilent官网GitHub下载 digilent-xdc
Can be downloaded in Digilent GitHub.
digilent-xdc (2021-04-24, VHDL, 83KB, 下载0次)
xilinx官网 xapp1052资料，用于AXI总线挂DMA，没有账号的可以这里下载了。
Xilinx official network xapp1052 data,For AXI bus hanging DMA. no account can be downloaded here. (2018-07-18, Verilog, 14045KB, 下载36次)
赛灵思官方pcie例程，官网下载需要注册登录，这边给大家另一个选择
Xilinx PCIe official routines, the official website to download the required registration login, here give you another choice (2018-03-01, Verilog, 2811KB, 下载7次)
nand flash 仿真模型，官网下载，希望对大家有用
This software code and all associated documentation, comments
or other information (collectively "Software") is provided
"AS IS" without warranty of any kind. (2017-07-23, Verilog, 133KB, 下载13次)
xilinx，microblaze的spi ip核的datasheet。xilinx官网速度慢，分享给有需要的朋友。
xilinx, microblaze the spi ip core datasheet. xilinx Officer slow speed of network share to a friend in need. (2016-07-06, VHDL, 435KB, 下载4次)
官网下载的，经过板级验证的ddr control mt45v16m16p源代码，verilog语言设计，希望可以用到系统化设计。
Official website to download, through board-level verification ddr control mt45v16m16p source code, verilog language design, hoping to use systematic design. (2016-06-29, VHDL, 23KB, 下载2次)
以太网FPGA通信,verilog代码，实现双向通信
Ethernet FPGA communication (2016-01-20, Others, 2135KB, 下载36次)
Xilinx kintex 7 的详细文档，从官网下载，编号DS-182
Xilinx kintex detailed documentation 7 downloaded the official website, No. DS-182 (2015-04-09, PDF, 647KB, 下载6次)
本代码是实现计算器的功能，用的是VHDL语言编写，全部实现过程都在这里面。
This code is to achieve the functions of the calculator, using the VHDL language, to achieve full process on the inside
(2015-01-05, VHDL, 828KB, 下载1次)
微信公众平台测试包,微信公众平台测试包,
Micro message public platform test package
(2014-07-21, PHP, 1KB, 下载3次)
以太网的FPGA程序实现以太网的FPGA程序实现以太网的FPGA程序实现
enternet verilog fpga (2013-12-15, VHDL, 60KB, 下载25次)
fira5v5 比赛专用软件，
由于之前的官网无法提供下载，现在分享一份。
fira5v5 race-specific software, can not be due to a previous official website available for download, now share a copy. (2013-07-23, C/C++, 6555KB, 下载9次)
DE2-70开发板实验例程 中文非官网资料
DE2-70 development board test routines Chinese non-official website information (2013-07-08, VHDL, 7025KB, 下载88次)
Alrera FPGA SOC Cyclone V 官网开发板调试记录
Alrera FPGA SOC Cyclone V official website development board debug log (2013-06-07, VHDL, 1085KB, 下载46次)
xilinx SP605 板卡，网口设计。echo设计，实现接收单字符并返回的功能，同时从串口显示输出内容,具体流程也可以参加xilinx官网有个xapp1026的范例
Xilinx SP605 board, network port design. echo design, implementation, receiving single character and returns the output from the serial port at the same time (2013-04-18, VHDL, 12098KB, 下载27次)
altera FPGA实现千兆以太网数据通信的程序源代码
altera FPGA Gigabit Ethernet data communication program source code (2013-01-28, VHDL, 5788KB, 下载346次)
XIlinx Virtex-6 （Spartan6及7系列）的PicoBlaze的源代码（官网转载），与用于Virtex2、Spartan3的不一样！
Xilinx Virtex-6 (Spartan6-and 7 series), the PicoBlaze the source code (the official website reproduced) with for Virtex2, the Spartan3' s not! (2013-01-10, VHDL, 3606KB, 下载22次)
以太网控制器的FPGA实现,用Verilog语言编写!
Ethernet controller FPGA, Verilog language! (2012-11-14, VHDL, 139KB, 下载12次)
8b10b编解码，aurora协议，遵照xilinx官网文档
8b10b encoder and decoder, aurora protocol (2011-06-28, VHDL, 3KB, 下载62次)
MAXplusⅡ入门与提高.rar
一本很经典的入门书
我们老师推荐的
MAXplus Ⅱ entry and improving. Rar is a classic primer recommended by our teachers (2008-06-27, VHDL, 12339KB, 下载99次)