DDS波形发生器下载搜索联合开发网

[VHDL/FPGA/Verilog] CIC

Verilog风格的CIC滤波器的matlab实现
CIC filter in matlab with verilog coding style (2018-05-27, matlab, 25KB, 下载3次)

http://www.pudn.com/Download/item/id/1527403317274460.html

[VHDL/FPGA/Verilog] fir-digital--lowpass-filter

基于verilogHDL硬件描述语言的fir数字低通滤波器的设计
fir digital lowpass filter design based on verilogHDL (2017-04-12, matlab, 29KB, 下载1次)

http://www.pudn.com/Download/item/id/1491977712903916.html

[VHDL/FPGA/Verilog] myvhdl

用VHDL实现了简单的程序编写和仿真。是一个10进制计数器。
Using VHDL to make a simple 10 counter and it s simulation (2014-06-20, matlab, 141KB, 下载2次)

http://www.pudn.com/Download/item/id/2570908.html

[VHDL/FPGA/Verilog] CODE_N_K

信道编码中基于电路结构的循环码 N-K级编码器
Channel coding circuit structure of cyclic code based on NK-level encoder (2013-05-28, matlab, 1KB, 下载3次)

http://www.pudn.com/Download/item/id/2261407.html

[VHDL/FPGA/Verilog] ch6

基于matlab的数字滤波器和均衡器的制作，包含gui界面
Matlab digital filter and equalizer-based production, including the GUI interface (2013-04-22, matlab, 4KB, 下载6次)

http://www.pudn.com/Download/item/id/2211050.html

[VHDL/FPGA/Verilog] FIRfilter

MATLAB中FIR滤波器设计，包括低通、带通和高通
The MATLAB FIR filter design, including low-pass, band-pass and high-pass (2013-04-12, matlab, 1KB, 下载7次)

http://www.pudn.com/Download/item/id/2197019.html

[VHDL/FPGA/Verilog] DSP_matlab_filter

语音信号的数字滤波,双线性卷积实现滤波器的设计
The voice signal of the digital filtering, bilinear convolution filter design (2013-04-02, matlab, 463KB, 下载4次)

http://www.pudn.com/Download/item/id/2183500.html

[VHDL/FPGA/Verilog] mxulie

基于matlab的产生M序列的源代码是5级线性移位反馈寄存器
Source code to produce the M-sequence 5 linear shift feedback register (2013-03-14, matlab, 1KB, 下载6次)

http://www.pudn.com/Download/item/id/2159818.html

[VHDL/FPGA/Verilog] synthesis-bandstop-filters

本例介绍直接合成带阻滤波器的方法，n阶滤波器能实现n个传输零点
A direct synthesis technique of a new class of bandstop coupled resonator elliptic filters is presented. Two different coupling schemes, which both include source–load coupling are used. The first coupling and routing scheme is the standard folded structure used in implementing bandpass elliptic filters with transmission zeros using resonators. (2013-03-12, matlab, 213KB, 下载4次)

http://www.pudn.com/Download/item/id/2156944.html

[VHDL/FPGA/Verilog] matched-filter-of-the-simulation

根号升余弦匹配滤波器的仿真。用matlab仿真基带传输的最佳接收机，使用的脉冲的跟升余弦，信号是4pam。然后接收端进行匹配滤波之后采样量化恢复原信号。
Square root ascending cosine matched filter of the simulation (2013-01-10, matlab, 2KB, 下载41次)

http://www.pudn.com/Download/item/id/2112571.html

[VHDL/FPGA/Verilog] Untitled

滤波器的程序设计，通带截止频率ωp=0.5,阻带截止频率ωs=0.66,实际通带波动不大于3dB,最小阻带衰减不小于50dB。假设一个混频信号，其中f1=3Hz,f2=20Hz。信号采样频率为50Hz。现将原信号与通过滤波器的信号进行比较
it is filter (2012-12-12, matlab, 1KB, 下载7次)

http://www.pudn.com/Download/item/id/2080862.html

[VHDL/FPGA/Verilog] hapf

单相混合有源电力滤波器的设计与控制，在matlab中的仿真模型，功能效果很好。
The design and control of single-phase hybrid active power filter in matlab simulation model, the function works well. (2012-12-11, matlab, 24KB, 下载188次)

http://www.pudn.com/Download/item/id/2079433.html

[VHDL/FPGA/Verilog] ditong

给定截止频率和阻带衰减，用窗函数法，设计fir滤波器
Given cutoff frequency and stop band attenuation, window function, design fir filter (2012-11-26, matlab, 1KB, 下载6次)

http://www.pudn.com/Download/item/id/2061175.html

[VHDL/FPGA/Verilog] three_apf

三相三线并联型有源电力滤波器设计与控制。
The three-phase three-wire shunt active power filter design and control. (2012-10-28, matlab, 1062KB, 下载158次)

http://www.pudn.com/Download/item/id/2029378.html

[VHDL/FPGA/Verilog] digital_filter_MATLAB

IIR和FIR数字滤波器设计原理及实现，原理+MATLAB程序
IIR and FIR digital filter design principle and implementation, the principle+MATLAB program (2012-09-24, matlab, 50KB, 下载8次)

http://www.pudn.com/Download/item/id/2000398.html

[VHDL/FPGA/Verilog] Numberical-Controlled-Oscillator

数控振荡器的设计，实验中用到的所有完整的工程文件在test8文件夹下。完整的工程文件包含： accumulator_precision.mdl frequency_resolution.mdl generating_a_ramp.mdl lutdepth_cost_a.mdl lutdepth_cost_b.mdl lutdepth_cost_c.mdl sine_wave.mdl sine_wave_iir.mdl sine_wave_iir_8bit.mdl sine_wave_iir_12bit.mdl
NCO desgin: accumulator_precision.mdl frequency_resolution.mdl generating_a_ramp.mdl lutdepth_cost_a.mdl lutdepth_cost_b.mdl lutdepth_cost_c.mdl sine_wave.mdl sine_wave_iir.mdl sine_wave_iir_8bit.mdl sine_wave_iir_12bit.mdl (2012-05-12, matlab, 105KB, 下载13次)

http://www.pudn.com/Download/item/id/1866386.html

[VHDL/FPGA/Verilog] vga

vga显示，可以用fpgavga连接显示器显示彩条，简单实用的verilog程序
vga display, you can connect with fpgavga display color bars, simple and practical procedure verilog (2011-04-10, matlab, 385KB, 下载3次)

http://www.pudn.com/Download/item/id/1485992.html

[VHDL/FPGA/Verilog] FPGA-basedimplementationoftherootraisedcosine

基于FPGA实现根升余弦滤波器的研究（在MATLAB环境中）
FPGA-based implementation of the root raised cosine filter (in the MATLAB environment) (2010-11-25, matlab, 38KB, 下载48次)

http://www.pudn.com/Download/item/id/1358653.html

[VHDL/FPGA/Verilog] minEfilter

本压缩包括最小均方滤波器的源码，可以在matlab上直接运行
compression including the minimum mean square filter source can be directly run Matlab (2007-04-13, matlab, 4KB, 下载98次)

http://www.pudn.com/Download/item/id/267644.html

[VHDL/FPGA/Verilog] 8899

最高优先级编码器，是特别好的东西，好不容易才弄到的．
highest priority encoder, is especially good things, the result of the hard-won. (2006-05-15, matlab, 9KB, 下载25次)

http://www.pudn.com/Download/item/id/184424.html