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按分类查找All VHDL/FPGA/Verilog(362) 
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[VHDL/FPGA/Verilog] math

适用于DSP的m脚本(CIC、FIR、FFT、快速卷积、部分滤波器等)
Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.) (2020-08-14, matlab, 32KB, 下载0次)

http://www.pudn.com/Download/item/id/1597415233314428.html

[VHDL/FPGA/Verilog] 74L90-8421BCD

利用74L90芯片实现8421BCD码异步置0置9计数器,完成1-99循环计数功能。
8421BCD use 74L90 chip code asynchronous counter is set to 0 means 9, 1-99 complete cycle counting. (2015-04-22, matlab, 127KB, 下载1次)

http://www.pudn.com/Download/item/id/1429670573746058.html

[VHDL/FPGA/Verilog] rx_tx_module

使用altera公司的处理器,使用verilog语言编程,程序功能是窗口发送接收程序
Use altera' s processors, using verilog language programming, the program features a window sending and receiving procedures (2014-05-05, matlab, 794KB, 下载1次)

http://www.pudn.com/Download/item/id/2530242.html

[VHDL/FPGA/Verilog] iir_1

IIR数字滤波器的M文件,简要的写了IIR的实现和具体编写的方法
IIR digital filter M-file, write a brief realization of IIR and specific method for the preparation of (2013-08-16, matlab, 1KB, 下载2次)

http://www.pudn.com/Download/item/id/2332057.html

[VHDL/FPGA/Verilog] chebishow

GUI能够进行基本的图形设计,此次是进行了一个切比雪夫低通滤波器的设计界面。
GUI is able to perform basic graphic design, this is carried out a Chebyshev low-pass filter design interface. (2013-06-05, matlab, 2KB, 下载4次)

http://www.pudn.com/Download/item/id/2270150.html

[VHDL/FPGA/Verilog] EMfilt1

非线性图像滤波器,,对图像加入椒盐噪声,采用窗口极值方法检测噪声,并用窗口中值代替噪声点
Nonlinear image filter, using windows to detect extreme noise and noise with the window instead of point values (2013-05-24, matlab, 1KB, 下载5次)

http://www.pudn.com/Download/item/id/2256318.html

[VHDL/FPGA/Verilog] weina

维纳滤波器的设计解决了滤出低频噪声的技术难题,为后续工作提供保障
Wiener filter design to solve the technical problems, filter out low-frequency noise to provide protection for the follow-up work (2013-05-18, matlab, 110KB, 下载3次)

http://www.pudn.com/Download/item/id/2248363.html

[VHDL/FPGA/Verilog] FIR-digital-filter--experiment

FIR数字滤波器的设计 窗函数法 和频率采样法
FIR digital filter design window function method and the frequency sampling method (2013-05-17, matlab, 3KB, 下载12次)

http://www.pudn.com/Download/item/id/2246517.html

[VHDL/FPGA/Verilog] pll_carrier_syn

本程序是锁相环的仿真程序,具有接收端载波同步的功能。注释详尽,程序规范。发端的调制方式有单载波调制,BPSK调制,QPSK调制可供选择。程序中有星座图,锁相环的频差、相差图,以及解调后的基带波形。
This program is a phase-locked loop simulation program, the with carrier synchronization receiving end function. Notes detailed program specifications. The originator of the modulation scheme to choose a single carrier modulation, BPSK modulation, QPSK modulation. Program constellation diagram, the PLL frequency difference, a difference of FIG, and the demodulated baseband waveform. (2013-04-11, matlab, 4KB, 下载167次)

http://www.pudn.com/Download/item/id/2195140.html

[VHDL/FPGA/Verilog] lvboqi

用MATLAB编程实现低高通滤波器的实现,滤出信号的低高频分量
MATLAB programming implementation of the low and high pass filter, filter out the low and high frequency components of the signal. (2013-04-09, matlab, 1KB, 下载4次)

http://www.pudn.com/Download/item/id/2192652.html

[VHDL/FPGA/Verilog] datafilter

本程序用matlab仿真了fir,iir数字滤波器,并且画出了其幅频特性图像
The program with matlab simulation fir, iir digital filter and draw its amplitude and frequency characteristics of the image (2013-03-28, matlab, 1KB, 下载5次)

http://www.pudn.com/Download/item/id/2177677.html

[VHDL/FPGA/Verilog] highpass

高通滤波器的仿真(由matlab和simulink两种方法实现)源文件以及图片示例
Simulation of the high-pass filter (implemented by the two methods matlab and simulink) source files as well as images example (2013-03-13, matlab, 340KB, 下载41次)

http://www.pudn.com/Download/item/id/2158220.html

[VHDL/FPGA/Verilog] neicha

应用时域内插公式模拟用理想低通滤波器由离散序列恢复模拟信号的编程
Application time domain interpolation formula simulation with ideal low-pass filter by discrete sequence recovery analog signal programming (2012-12-21, matlab, 1KB, 下载8次)

http://www.pudn.com/Download/item/id/2091321.html

[VHDL/FPGA/Verilog] 16QAM

仿真练习(第六次刘课件中有关于噪声的添加方法) ? 编写一个含QAM传输的发送和接收模块 ? 分别采用复基带仿真和实带通仿真两种形式 ? 复基带仿真时过采样率为4倍,实带通仿真时过采样率为20倍, 实带通仿真时, 载波频率为符号率的4倍 ? 发端采用滚降系数0.5的根号升余弦滤波器 ? 画出Eb/N0=15dB时的接收波形(收滤波前),取100个采样 ? 画出发端输出的眼图和收端过匹配滤波后的眼图(画眼图时不加噪声) ? 统计误符号率和误比特率与Eb/N0的关系,画出曲线, 与理论计算的曲线相对比
Simulation exercises about noise (sixth Liu courseware Add method) ? Preparation of the one containing the transmission and reception of QAM transmission module ? Complex baseband simulation and real bandpass simulation were used in two forms ? When the simulation of the complex baseband oversampling rate 4 times, real bandpass simulation over-sampling rate of 20 times the real bandpass simulation, the carrier frequency is 4 times the symbol rate ? Originator using the square root raised cosine filter roll-off factor of 0.5 ? Draw Eb/N0 = 15dB received waveform (received before filtering), take the 100 samples ? Draw originator output eye diagram and eye diagram after the receiving end matched filtering plus noise (painted eye diagram) ? Statistics symbol error rate and bit error rate and Eb/N0 relationship, draw curves, and compared with the theoretical calculation of the curve (2012-12-15, matlab, 7KB, 下载53次)

http://www.pudn.com/Download/item/id/2084278.html

[VHDL/FPGA/Verilog] TOW_ORDER_FILTER

这是一个二阶数字滤波器的仿真资料,已经通过方针验证,并在实际应用中使用。
introduced two order filter design the paper is very significant value resource and used in engineering (2012-12-01, matlab, 11KB, 下载6次)

http://www.pudn.com/Download/item/id/2067681.html

[VHDL/FPGA/Verilog] LowpassFIR

选择hamming窗来实现最小阻带衰减为50dB的一个低通FIR滤波器
Select hamming window to achieve the minimum stopband attenuation of 50dB, a low-pass FIR filter (2012-10-16, matlab, 1KB, 下载8次)

http://www.pudn.com/Download/item/id/2017082.html

[VHDL/FPGA/Verilog] FIR_IIR_filters

matlab滤波器设计,包括FIR和IIR设计,以及参数建模方法。
matlab filter design ,including FIR and IIR design, and parametric modeling method. (2012-08-27, matlab, 463KB, 下载39次)

http://www.pudn.com/Download/item/id/1977222.html

[VHDL/FPGA/Verilog] LoopFilter

科斯塔斯环环路滤波器的VHDL实现,仅工参考
VHDL Implementation of Costas Loop the loop filter, the only work of reference (2012-07-20, matlab, 1KB, 下载26次)

http://www.pudn.com/Download/item/id/1944472.html

[VHDL/FPGA/Verilog] Convolution-report

卷积码编解码器实现报告 包括 目的 要求 内容 代码 总结等
Convolutional encoding and decoding the report, including the purpose of the request content code summary (2012-06-12, matlab, 36KB, 下载20次)

http://www.pudn.com/Download/item/id/1910710.html

[VHDL/FPGA/Verilog] quanjiaqi

全加器的详细设计思路和用VHDL语言编写的详细源代码
increase for the whole of the detailed design ideas and the use of VHDL for preparing a detailed source code (2006-04-17, matlab, 214KB, 下载14次)

http://www.pudn.com/Download/item/id/172647.html
总计:362