光子计数器FPGA单像素成像
Photon Counter FPGA SinglePixelImaging (2024-03-30, Verilog, 0KB, 下载0次)
精简指令集计算机（RISC）处理器。该处理器采用Verilog HDL进行设计，使用Xilinx ISE进行综合，使用ModelSim模拟器进行模拟，然后在XilinxSpartan3E FPGA上实现。
Reduced Instruction Set Computer (RISC) processor. The processor has been designed with Verilog HDL, synthesized using Xilinx ISE, simulated using ModelSim simulator, and then implemented on Xilinx Spartan 3E FPGA. (2024-03-18, Verilog, 0KB, 下载0次)
Gwen处理器内核（在FPGA上运行）
Gwen Processor Core（Run at FPGA） (2024-03-14, Verilog, 0KB, 下载0次)
verilog 2023初级激光器2
verilog 2023 priliminary Laser2 (2024-03-14, Verilog, 0KB, 下载0次)
用Verilog HDL实现二进制计数器
Implementation Binary Counter with Verilog HDL (2023-11-15, Verilog, 0KB, 下载0次)
该存储库包含一个用Verilog硬件描述语言编写的简单处理器、一些报告（用pt-BR编写）和模拟器...，
This repository contains a simple processor written in Verilog hardware description language, some reports (written in pt-BR) and simulations that I made while ago. (2016-09-30, Verilog, 0KB, 下载0次)
用SystemVerilog编写的MIPS32处理器实现，
MIPS32 Processor Implementation written in SystemVerilog, (2015-05-12, Verilog, 0KB, 下载0次)
基于fpga的Gameboy Advance（gba）模拟器
A Gameboy Advance (gba) emulator on fpga (2019-01-13, Verilog, 1772KB, 下载0次)
Xilinx FPGA的比特币挖矿器
Bitcoin miner for Xilinx FPGAs (2013-06-11, Verilog, 31KB, 下载0次)
verilog中的可编程密码协处理器
a programmable cryptographic coprocessor in verilog (2015-09-14, Verilog, 61319KB, 下载0次)
用Verilog编写的PDP-10处理器
A PDP-10 processor written in Verilog (2019-08-21, Verilog, 71KB, 下载0次)
在Verilog中循环精确的MC6502兼容处理器。
Cycle accurate MC6502 compatible processor in Verilog. (2021-10-11, Verilog, 47KB, 下载0次)
一种视频显示模拟器
A Video display simulator (2023-04-19, Verilog, 1770KB, 下载0次)
mor1kx-一个OpenRISC 1000处理器IP核
mor1kx - an OpenRISC 1000 processor IP core (2022-05-22, Verilog, 247KB, 下载0次)
一个简单的二进制计数器，但将其拆分为数据通路和状态机，便于理解学习
A simple binary counter, but it is divided into data path and state machine, easy to understand and learn (2020-12-08, Verilog, 1KB, 下载0次)
使用verilog实现ppm解码器，功能仿真通过，附设计说明，THU微纳电子系ic设计课大作业。
a ppm decoder written in VerilogHDL, a design document is available (2020-06-17, Verilog, 1360KB, 下载13次)
基于赛灵思vivado环境下，分频器，包括测试代码，仿真代码等
Frequency divider based on Xilinx vivado environment, including test code, simulation code, etc. (2019-04-25, Verilog, 160KB, 下载5次)
基于fpga的小数分频完整代码，应用小数前置算法，设计的一个小数分频器，这里实现了8.7的分频。
Based on fpga decimal frequency division complete code, the application of decimal preposition algorithm, design of a decimal frequency divider, here achieve 8.7 frequency division. (2018-12-16, Verilog, 4KB, 下载2次)
FPGA下的UART串口通信协议及控制器设计
UART serial communication protocol and controller design under FPGA (2018-04-26, Verilog, 1KB, 下载14次)
带同步置1、异步清0的D触发器。详细的讲解，易懂。
D flip-flop with synchronous 1 and asynchronous clear 0. Detailed explanation, easy to understand. (2017-08-05, Verilog, 2886KB, 下载1次)