DDS波形发生器下载搜索联合开发网

[VHDL/FPGA/Verilog] 16-bit-processor-using-Verilog

使用Verilog的16位处理器
16 bit processor using Verilog (2024-01-10, Verilog, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1705050104198373.html

[VHDL/FPGA/Verilog] ProgramCounter

verilog中程序计数器的实现
Implementation of a program counter in verilog (2023-11-10, Verilog, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1699658795938451.html

[VHDL/FPGA/Verilog] MIPS32

Verilog中MIPS32处理器的RISC实现
RISC Implementation of MIPS32 Processor in Verilog (2023-11-04, Verilog, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1699102790288840.html

[VHDL/FPGA/Verilog] risc_v_processor

使用verilog实现risc-v处理器，
implementation of risc-v processor using verilog, (2023-09-22, Verilog, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1695450136524606.html

[VHDL/FPGA/Verilog] Hardware_Description_Language_Project

在VERILOG中构建处理器，
Building Processor in VERILOG, (2020-04-08, Verilog, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1694149977250593.html

[VHDL/FPGA/Verilog] SHA256_Hardware_Accelerator

SHA256硬件加速器可合成Verilog RTL，
SHA256 Hardware Accelerator Synthesizable Verilog RTL, (2019-01-10, Verilog, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1694142892787800.html

[VHDL/FPGA/Verilog] Traffic-light-simulator

Verilog中的交通灯模拟器，
Traffic light simulator in Verilog, (2019-06-08, Verilog, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1694142756527193.html

[VHDL/FPGA/Verilog] Register_File

8*16寄存器文件的Verilog设计，
Verilog Design of 8*16 Register File, (2023-08-30, Verilog, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1693393423953552.html

[VHDL/FPGA/Verilog] SynthoSphere-PIC16C5x-FPGA_Processor_Core

PIC16C5x兼容FPGA处理器内核，
PIC16C5x-compatible FPGA Processor core, (2023-08-26, Verilog, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1693027645733599.html

[VHDL/FPGA/Verilog] Processor-Design

通过Verilog HDL构建简单的处理器，
Build a simple processor by Verilog HDL, (2023-08-03, Verilog, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1691252336468551.html

[VHDL/FPGA/Verilog] HEVC-DCT

论文代码是关于HEVC解码器和编码器的DCT和IDCT块。使用Quartus软件在Verilog中完成...
Code for thesis about DCT and IDCT block of an HEVC decoder and encoder. Done in Verilog using Quartus software from Altera. (2018-02-16, Verilog, 55386KB, 下载0次)

http://www.pudn.com/Download/item/id/1518729353249960.html

[VHDL/FPGA/Verilog] LSTM

单个长短期存储器（LSTM）单元：Verilog实现
Single Long Short Term Memory (LSTM) cell : Verilog Implementation (2020-05-20, Verilog, 3KB, 下载0次)

http://www.pudn.com/Download/item/id/1589969594939003.html

[VHDL/FPGA/Verilog] OpenMIPS

OpenMIPS——《自己动手写CPU》处理器部分
OpenMIPS - The Processor Section of "Write CPU Yourself" (2017-03-04, Verilog, 3066KB, 下载0次)

http://www.pudn.com/Download/item/id/1488614308897887.html

[VHDL/FPGA/Verilog] EDSAC

1949年EDSAC计算机的FPGA Verilog实现，带有动画磁带读取器、面板、电传打印机和CRT示波器
FPGA Verilog implementation of 1949 EDSAC Computer with animated tape reader, panel, teleprinter and CRT scope (2020-05-24, Verilog, 3607KB, 下载0次)

http://www.pudn.com/Download/item/id/1590285016215844.html

[VHDL/FPGA/Verilog] spi_2

DAC3283 寄存器初始化，SPI驱动
Dac3283 register initialization, SPI drive (2020-03-14, Verilog, 3644KB, 下载2次)

http://www.pudn.com/Download/item/id/1584151010706522.html

[VHDL/FPGA/Verilog] sram_rw_ctrl

简单的 sram memory 读写控制器
Simple SRAM memory controller (2018-08-16, Verilog, 1KB, 下载5次)

http://www.pudn.com/Download/item/id/1534409414462369.html

[VHDL/FPGA/Verilog] 基于VHDL实现单精度浮点数的加-减法运算

vhdl 加法器和减法器希望对VHDL的同学有参考作用
VHDL adder and function as relative reference (2018-08-03, Verilog, 654KB, 下载12次)

http://www.pudn.com/Download/item/id/1533302089316213.html

[VHDL/FPGA/Verilog] beep

verilog HDL语言实现控制蜂鸣器报警
Verilog HDL language to control buzzer alarm (2018-05-05, Verilog, 3033KB, 下载1次)

http://www.pudn.com/Download/item/id/1525505383194179.html

[VHDL/FPGA/Verilog] LS164

用verilog原因实现LS164移位寄存器
Implementation of the LS164 shift register with Verilog (2018-02-28, Verilog, 354KB, 下载1次)

http://www.pudn.com/Download/item/id/1519806031868459.html

[VHDL/FPGA/Verilog] Verilog_1Gb_DDR3_G_Die

ddr3控制器，速率可达1Gbps，语言使用verilog，已经加入tb
ddr3 controller, can be used to ddr3 control,high speed (2017-12-14, Verilog, 33KB, 下载22次)

http://www.pudn.com/Download/item/id/1513221092639979.html