使用VHDL语言实现扩频器,使用VHDL实现,里面有VHDL代码和工程文件。
Using VHDL language to achieve the spread spectrum, using VHDL implementation, which has VHDL code and engineering documents. (2021-03-24, VHDL, 449KB, 下载0次)
Implementing QPSK using DSS
Implementing QPSK using DSS (2020-01-14, VHDL, 720KB, 下载1次)
学习利用LPM-ROM设计一个简易的正弦信号发生器。由计数器,正弦波数存储器ROM,VerilogHDL顶层程序设计,8为D/A转换器构成。
Learn to use lpm-rom to design a simple sinusoidal signal generator. By counter, sine wave number memory ROM, Verilog HDL top-level programming, 8 for D / a converter. (2019-12-25, VHDL, 1492KB, 下载0次)
可采用硬件编程,控制蜂鸣器,进行演奏歌曲
Hardware programming can be used to control buzzer and perform songs. (2019-05-31, VHDL, 9KB, 下载0次)
基于VHDL硬件描述语言的基带码发生器程序设计与仿真,基于VHDL硬件描述语言,产生常用基带码
Based on VHDL hardware description language, the common baseband codes are generated. (2018-10-13, VHDL, 44KB, 下载0次)
设计基于ROM的正弦波发生器,对其编译,仿真。
1.学习VHDL的综合设计应用
2. 学习基于ROM的正弦波发生器的设计
Design sine wave generator based on ROM, compile and simulate it.
1. integrated design and application of learning VHDL
2. learning the design of sine wave generator based on ROM (2018-05-16, VHDL, 17KB, 下载0次)
A family of leased line data communication technologies that provides a dedicated synchronous transmission connection at speeds of 56 Kbps. Digital data service (DDS) is only one example of a type of digital line; others include Integrated Services Digital Network (ISDN) and T1. DDS can be used in either multipoint or point-to-point communications and requires dedicated digital lines. DDS lines can also be used to connect buildings on a campus, usually with a maximum distance of about 3 miles.
A family of leased line data communication technologies that provides a dedicated synchronous transmission connection at speeds of 56 Kbps. Digital data service (DDS) is only one example of a type of digital line; others include Integrated Services Digital Network (ISDN) and T1. DDS can be used in either multipoint or point-to-point communications and requires dedicated digital lines. DDS lines can also be used to connect buildings on a campus, usually with a maximum distance of about 3 miles. (2017-11-08, VHDL, 15KB, 下载1次)
用verilog语言编写的并且仿真通过的100111序列发生器的工程文件夹
the generator of 100111 (2012-05-15, VHDL, 25KB, 下载5次)
DDS in our camera design
DDS in our camera design (2010-02-26, VHDL, 6KB, 下载6次)
特殊信号发生器,用来模拟产生调试用雷达脉冲簇。。。。
special signal maker (2010-02-25, VHDL, 1KB, 下载26次)
频率计,自动记录信号波形,宽频,四位,自动换挡
Frequency counter, automatic recording signal waveform, broadband, 4, auto-shift (2009-09-15, VHDL, 135KB, 下载7次)
用于测试波形的频率,从10-10Mhz可测,对任意波形可测。
it is based on FPGA and shimite chufa ,and the frequency of the desired wave is gotten. (2009-09-01, VHDL, 2374KB, 下载9次)
基于DDS的FSK调频,通过控制频率控制字1和频率控制字2来实现不同频率选择
DDS-based FSK FM, by controlling the frequency control and frequency control word 1 word 2 to achieve different frequency selection (2009-08-31, VHDL, 742KB, 下载14次)
一个DDS芯片AD9851的VERILOG程序,加74HC574锁存器!
A DDS chip AD9851' s VERILOG program, plus 74HC574 latch! (2009-08-25, VHDL, 1KB, 下载19次)
ad9851的中文资料,本人希望可以和喜爱DDS或者FPGA的朋友一起交流
Chinese ad9851 information, I would like to DDS and love of friends or the exchange of FPGA (2009-07-28, VHDL, 539KB, 下载63次)
基于FPGA的DDS调幅与调频,调幅在0到5V步进为0.1V,频率从10HZ到1M,分为两段,一段为10HZ到1KHZ,步进为10HZ,1KHZ到1MHZ,步进为1KHZ
DDS-based FPGA' s AM and FM, AM Stepping in the 0 to 5V for 0.1V, the frequency from 10HZ to 1M, is divided into two paragraphs, one for the 10HZ to 1KHZ, stepping to 10HZ, 1KHZ to 1MHZ, stepping to 1KHZ (2009-07-10, VHDL, 124KB, 下载44次)
多功能函数发生器,可以产生方波,锯齿波,正弦波,三角波
Multi-function generator can produce square wave, sawtooth, sine wave, triangle wave (2009-04-29, VHDL, 970KB, 下载16次)
序号发生器 用于通信解码 编码 好东西大家一起分享 请支持
Serial number generator for decoding coded communication a good thing to share, please support the U.S. (2009-02-22, VHDL, 1KB, 下载2次)
这是一个用abel语言编写的三角波发生器
This is a language used abel triangular wave generator (2008-07-31, VHDL, 18KB, 下载4次)
脉冲发生器,可实现脉宽和幅度的任意调节。相信对大家有用。
Pulse generator, pulse width and amplitude can realize arbitrary regulation. I believe it useful to everyone. (2008-04-11, VHDL, 502KB, 下载100次)