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按分类查找All VHDL/FPGA/Verilog(70) 
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[VHDL/FPGA/Verilog] encoder-based-on-Gray-code

基于VHDL格雷码编码器的设计,可以在试验箱上直接运行
Design of VHDL encoder based on Gray code, can be run directly in the chamber (2016-02-25, Unix_Linux, 63KB, 下载1次)

http://www.pudn.com/Download/item/id/1456386085972370.html

[VHDL/FPGA/Verilog] ep9351_read_reg

ep9351芯片的一个读取寄存器的测试程序,因为他的读取方式跟别的i2c设备不同,所以重新封装了一些i2c读写的接口。
one read ep9351 chip registers testing procedures, because he read i2c device with another different way, so repackaging some i2c interface to read and write. (2015-06-08, Unix_Linux, 83KB, 下载10次)

http://www.pudn.com/Download/item/id/1433729934971097.html

[VHDL/FPGA/Verilog] LIFO

LIFO,先进后出缓冲器(栈),verilog源代码,包括测试代码。
LIFO, last-out buffer (stack), verilog source code, including test code. (2014-05-12, Unix_Linux, 2KB, 下载27次)

http://www.pudn.com/Download/item/id/2538363.html

[VHDL/FPGA/Verilog] FIFO.v

异步先进先出FIFO存储器,采用格雷码判定,消耗资源更小
Asynchronous FIFO FIFO memory, using Gray code determination, consume less resources (2014-04-29, Unix_Linux, 1KB, 下载5次)

http://www.pudn.com/Download/item/id/2525964.html

[VHDL/FPGA/Verilog] conv_encoder

TD-LTE中(3.1.7)咬尾卷积码编码器verilog代码
Tail-biting convolutional code encoder verilog code (2014-04-09, Unix_Linux, 1KB, 下载39次)

http://www.pudn.com/Download/item/id/2505952.html

[VHDL/FPGA/Verilog] a_rule-based_auto-focus_algorithm

是学习了解TI dm平台的关于自动聚焦算法,和滤波器配置很好的资料。
Information is very good for TI dm,about the automatic focusing and The coefficient of filter configuration. (2013-06-14, Unix_Linux, 378KB, 下载10次)

http://www.pudn.com/Download/item/id/2278628.html

[VHDL/FPGA/Verilog] microcode

任天堂nes系统 中央处理器部分代码,希望大家能用得着
Part of the code of the Nintendo nes system central processor (2013-03-29, Unix_Linux, 10KB, 下载3次)

http://www.pudn.com/Download/item/id/2178461.html

[VHDL/FPGA/Verilog] polyfilter

用verilog实现一个四阶的多项抽取滤波器,实现2倍下采样
Number of decimation filter verilog to achieve a fourth order 2 times sampling (2012-12-13, Unix_Linux, 1KB, 下载10次)

http://www.pudn.com/Download/item/id/2082063.html

[VHDL/FPGA/Verilog] mcu_ctrl

MCU控制器verilog源代码,可以fpga验证,与大家分享。
MCU controller verilog source code, fpga verification, to share with you. (2012-07-08, Unix_Linux, 6KB, 下载5次)

http://www.pudn.com/Download/item/id/1933471.html

[VHDL/FPGA/Verilog] host

I2C控制器源代码,可以被综合,经过fpga验证,与大家分享。
I2C controller source code can be integrated, after fpga verification, to share with you. (2012-07-08, Unix_Linux, 8KB, 下载3次)

http://www.pudn.com/Download/item/id/1933465.html

[VHDL/FPGA/Verilog] firfilt

FIR滤波器verilog源代码,经过fpga验证可以被综合。
FIR filter verilog source code, fpga verification can be integrated. (2012-07-08, Unix_Linux, 5KB, 下载20次)

http://www.pudn.com/Download/item/id/1933461.html

[VHDL/FPGA/Verilog] CRC.C

下面以最常用的CRC-16为例来说明其生成过程。   CRC-16码由两个字节构成,在开始时CRC寄存器的每一位都预置为1,然后把CRC寄存器与8-bit的数据进行异或(异或:二进制运算 相同为0,不同为1;0^0=0 0^1=1 1^0=1 1^1=0),   之后对CRC寄存器从高到低进行移位,在最高位(MSB)的位置补零,而最低位(LSB,移位后已经被移出CRC寄存器)如果为1,则把寄存器与预定义的多项式码进行异或,否则如果LSB为零,则无需进行异或。重复上述的由高至低的移位8次,第一个8-bit数据处理完毕,用此时CRC寄存器的值与下一个8-bit数据异或并进行如前一个数据似的8次移位。所有的字符处理完成后CRC寄存器内的值即为最终的CRC值。
Below the most commonly used CRC-16 as an example to illustrate the generation process. CRC-16 yards by two-bytes at the beginning of every one of the CRC register is preset to 1, then the CRC register with the 8-bit data XOR (exclusive or: the same as the binary operation 0, different 1 0 ^ 0 = 0 0 ^ 1 = 1 1 ^ 0 = 1 1 ^ 1 = 0), After the shift the CRC register from highest to lowest, the most significant bit (MSB) position zeros, the least significant bit (LSB after the shift has been out of the CRC register) 1, put the register with pre-defined item code different, or, otherwise, if the LSB is zero, you do not need to XOR. Repeat the above the descending order of the shift eight times, the first 8-bit data processing is completed, such as previous data like 8 times shift the CRC register values ​ ​ and the next 8-bit data XOR and . After completion of all the characters deal with the value of the CRC register is the final CRC value. (2012-02-14, Unix_Linux, 11KB, 下载14次)

http://www.pudn.com/Download/item/id/1771589.html

[VHDL/FPGA/Verilog] aaa

基于ARM和FPGA的嵌入式运动控制器的研究
Based on the ARM and FPGA embedded motion controller based on (2011-12-17, Unix_Linux, 1673KB, 下载14次)

http://www.pudn.com/Download/item/id/1734355.html

[VHDL/FPGA/Verilog] filter_stage1

虑波器,可综合代码风格,易懂,好理解。十六位的
Recorder, which can be integrated code style, easy to understand, easy to understand (2011-05-18, Unix_Linux, 2KB, 下载2次)

http://www.pudn.com/Download/item/id/1537409.html

[VHDL/FPGA/Verilog] uvga-conio-demo

一款VGA显示器的实力代码,有兴趣的可以下载
The strength of a VGA display code can be downloaded interested (2011-04-08, Unix_Linux, 1223KB, 下载4次)

http://www.pudn.com/Download/item/id/1483771.html

[VHDL/FPGA/Verilog] VHDL100

一套不错的VHDL例子,附带清华大学自主研制的仿真器,仿真结果都有的,希望给您提供很方便
VHDL a good example of self-developed with Tsinghua University, simulator, simulation results are, I hope to provide you with easy (2010-11-16, Unix_Linux, 35742KB, 下载5次)

http://www.pudn.com/Download/item/id/1347982.html

[VHDL/FPGA/Verilog] AT91SAM9261-BasicLCD-IAR4_30A-1_1

GPS 导航器TFT 驱动源程序。主CPU为ATmel的AT91sam9261(ARM926的内核)
TFT GPS navigation device driver source code. CPU for the AT91sam9261 ATmel (ARM926 the kernel) (2007-01-03, Unix_Linux, 808KB, 下载138次)

http://www.pudn.com/Download/item/id/239065.html

[VHDL/FPGA/Verilog] risc5x_rel1[1].1

risc5x源代码。介绍了一般微处理器核的设计原理、基本概念和方法.
risc5x source code. On the general design of the microprocessor nuclear principles and basic concepts and methods. (2006-12-17, Unix_Linux, 32KB, 下载5次)

http://www.pudn.com/Download/item/id/234206.html

[VHDL/FPGA/Verilog] xapp353

可编程器件厂商Xilinx的用于设计SMBus 控制器的源程序,包括完整的说明帮助,以及可以用于xlinx器件的可综合的代码
makers Xilinx programmable devices used in the design of the controller SMBus source, including a complete explanation of help and can be used xlinx devices can be integrated code (2005-12-31, Unix_Linux, 1063KB, 下载22次)

http://www.pudn.com/Download/item/id/137298.html

[VHDL/FPGA/Verilog] Alu1232

VHDL开发的计数器。源程序不复杂,应该都能看懂。最重要的注意:是时序问题
VHDL development of the counter. Source code is not complicated, should be able to understand. The most important Note : Timing is the issue (2005-04-13, Unix_Linux, 1KB, 下载18次)

http://www.pudn.com/Download/item/id/1113359436378375.html
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总计:70