[其他] MASTER_RWOK_07131900
主从寄存器QSPI通信，主从寄存器的读与写的功能模块的实现
QSPI,Master slave register QSPI communication, master slave register read and write function module. (2020-12-28, VHDL, 20759KB, 下载0次)
[其他] DS18B20
基于VHDL语言的温度传感器读写程序，可以做成模块集成到主程序中，用于芯片式温度传感器DS18B20.
The temperature sensor reading and writing program based on VHDL language can be made into a module and integrated into the main program for chip temperature sensor DS18B20 (2020-07-21, VHDL, 94KB, 下载0次)
[其他] 实验4 数控分频器的设计
eda实验报告数控分屏器的设计包含实验目的与实验原理
The design of EDA experiment report NC splitter includes the purpose and principle of experiment (2020-07-03, VHDL, 47KB, 下载0次)
[其他] xcvr_user_guide_ch
该文档为Altera公司FPGA收发器PHY IP核用户指南，中文版
This document is Altera's PHY IP Core User Guide for FPGA Transceivers, Chinese Version (2018-12-26, VHDL, 4270KB, 下载3次)
[其他] wenjian
可实现六分频的分频器VHDL代码，希望对新手有帮助
VHDL frequency divider can be achieved six code, I hope to help the novice. (2018-05-21, VHDL, 4KB, 下载0次)
[其他] 24进制计数器
本程序能将输入的时钟信号进行周期计数，每次接收到CLK的上升沿时计数器值加一（以二进制形式储存）
This program can count the input clock signal periodically, and add one (binary in form) when the CLK's rising edge is received each time. (2018-05-05, VHDL, 330KB, 下载0次)
[其他] IIRDirect
采用一种基于FPGA的IIR数字滤波器的设计方案：AD转换模块、IIR滤波模块、DA转换模块。
A design scheme of IIR digital filter based on FPGA is adopted: AD conversion module, IIR filter module and DA conversion module. (2018-04-06, VHDL, 808KB, 下载5次)
[其他] qiangdaqi
简单的使用VHDL语言编写的可在FPGA cycloneIII开发板上实现的三路抢答器
The simple three way answering machine based on VHDL. (2018-03-24, VHDL, 10944KB, 下载2次)
[其他] Exp302
这是一个在quartus2上写好的JK触发器，下载并运行其中quartus文件即可。
This is a JK trigger written on quartus2, downloading and running the quartus file. (2017-12-31, VHDL, 7380KB, 下载1次)
[其他] sync_fifo2
读写控制器，实现指定地址的读写功能，带空满警告，经典。
Read and write controller, to achieve the specified address read and write function, with empty full warning, classic. (2017-11-14, VHDL, 891KB, 下载1次)
[其他] xor8b
实现8位全加器，为初学者提供参考，对VHDL语言有一定了解
It's a addler of 8 bits,which is designed for new learners (2017-07-11, VHDL, 93KB, 下载1次)
[其他] xor4b
实现四位全加器，为初学者提供参考说明，对VHDL语言有一定了解
it's a addler of four bits,which is designed for the new learner of VHDL language (2017-07-11, VHDL, 89KB, 下载1次)
[其他] music_disply
音乐播放器 中的数控分频器 后续还需要添加一个分频的电路
Music player in the follow-up of NC divider also need to add a sub-frequency circuit (2010-02-02, VHDL, 672KB, 下载21次)
[其他] simple_spi_latest.tar
sip接口的主控制器代码和从控制器代码，使用寄存器基于SPI接口的通讯，包括仿真，综合的结果
sip host controller interface code and the code from the controller, use the register-based SPI interface communication, including simulation, synthesis results (2009-10-16, VHDL, 562KB, 下载23次)
[其他] RS(204.188)design
RS(204,188)译码器说明
原文件：
rs_decoder.v（顶层文件）, SyndromeCalc.v（计算伴随式）, BM_KES.v（BM求解关键方程）,
Forney.v（Forney算法求误差样值）, CheinSearch.v（搜索错误位置）,ff_mul.v（有限域乘法）。
ROM及初始化文件：
rom_inv.v（求逆运算）, rom_power.v（求幂运算）；
rom_inv.mif（ROM初始化文件）, rom_power.mif（ROM初始化文件）。
仿真波形：
rs_decoder.vwf。
RS (204,188) decoder that the original document: rs_decoder.v (top-level document), SyndromeCalc.v (calculated Syndrome), BM_KES.v (BM key equation solving), Forney.v (Forney algorithm for error-like value), CheinSearch.v (search the wrong location), ff_mul.v (finite field multiplication). ROM and the initialization file: rom_inv.v (inverse operation), rom_power.v (for power calculations) rom_inv.mif (ROM initialization file), rom_power.mif (ROM initialization files). Simulation waveforms: rs_decoder.vwf. (2009-08-20, VHDL, 14KB, 下载119次)
[其他] TI_EZDSPF2808USB
TMS320F2808系列USB仿真器的下载线，有pcb原理图，我费了好大的劲才弄到的，希望各位珍惜！！！
TMS320F2808 USB (2009-03-26, VHDL, 77KB, 下载67次)
[其他] Test_bcd.~(4).VHDTST
这是有关于二进制计数器的AD转换内容，大家可以
This is a binary counter on the contents of the AD conversion, we can (2008-12-13, VHDL, 1KB, 下载1次)
[其他] shiyan6
一个8位的十进制频率计数器,功能经过测试.
An 8-bit decimal frequency counter, function tested. (2008-11-09, VHDL, 1KB, 下载59次)
[其他] Xilinx_usb_jtag
Xilinx_usb_jtag
下载器原理图及程序
Download browser Xilinx_usb_jtag schematic diagram and procedure (2008-09-28, VHDL, 1826KB, 下载115次)
[其他] VGALCD
lcd控制器的源程序，可以随便使用，免费试用。不多描述。
lcd controller source code, you can not use, free trial. Not much to describe. (2008-05-27, VHDL, 483KB, 下载221次)