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[VHDL/FPGA/Verilog] TinyCPU

我创建了一个自定义CPU和汇编程序，作为我的CPU设计知识的有趣的实际应用程序。
A custom CPU and assembler I created as a fun practical application of my CPU designing knowladge. (2024-01-25, Python, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1706216757277512.html

[VHDL/FPGA/Verilog] HDLC-Python-Internship

实习专注于Python编程，完成了两个项目。开发了一个Tkinter计算器应用程序，具有改进的用户体验和我…
Internship focused on Python programming, completing two projects. Developed a Tkinter calculator app with improved user experience and i… (2024-01-17, Python, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1705635788499537.html

[VHDL/FPGA/Verilog] HDLC-Python-Internship

实习专注于Python编程，完成了两个项目。开发了一个Tkinter计算器应用程序，具有改进的用户体验和输入验证。设计了Streamlit BMI计算器web应用程序，强调个性化健康信息的性能优化。
Internship focused on Python programming, completing two projects. Developed a Tkinter calculator app with improved user experience and input validation. Designed a Streamlit BMI calculator web app, emphasizing performance optimization for personalized health information. (2024-01-05, Python, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1704423177797369.html

[VHDL/FPGA/Verilog] HDLC-Internship

实习专注于Python编程，完成了两个项目。开发了一个Tkinter计算器应用程序，具有改进的用户体验和输入验证。设计了Streamlit BMI计算器web应用程序，强调个性化健康信息的性能优化。
Internship focused on Python programming, completing two projects. Developed a Tkinter calculator app with improved user experience and input validation. Designed a Streamlit BMI calculator web app, emphasizing performance optimization for personalized health information. (2024-01-05, Python, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1704423174550408.html

[VHDL/FPGA/Verilog] tt05-psg-sn76489

使用来自Texas Instrum的SN76489数字复数声音发生器（DCSG）可编程声音发生器（PSG）芯片的TinyTapeout提交...
TinyTapeout submission with the SN76489 Digital Complex Sound Generator (DCSG) programmable sound generator (PSG) chip from Texas Instruments. (2023-10-31, Python, 0KB, 下载0次)

http://www.pudn.com/Download/item/id/1698761993990711.html

[VHDL/FPGA/Verilog] NetASM-python

NetASM是一个网络汇编程序，它采用高级SDN语言（NetKAT、P4等）并将原语映射到设备...
NetASM is a network assembler that takes high-level SDN languages (NetKAT, P4, etc.) and maps the primitives to device-specific directives in FPGAs and various chipsets. (2015-07-15, Python, 114KB, 下载0次)

http://www.pudn.com/Download/item/id/1436910540823804.html

[VHDL/FPGA/Verilog] pyVersioning

收集版本信息并导出为任何编程语言源文件，以便包含在编译中。
Gather version information and export as any programming language source file for inclusion into compilation. (2023-02-24, Python, 163KB, 下载0次)

http://www.pudn.com/Download/item/id/1677173040287658.html

[VHDL/FPGA/Verilog] PLDude

一个命令行实用程序，可轻松为PLD生成位流和各种编程文件
A command line utility to generate bitstreams and various programming files easily for PLDs (2022-07-18, Python, 13KB, 下载0次)

http://www.pudn.com/Download/item/id/1658077718423688.html

[VHDL/FPGA/Verilog] 手把手教你学FPGA 语法篇

编程规范是重中之重，带你书写良好的变成习惯
It is used to measure noise and detect road noise pollution. It is accurate and has good effect. (2018-03-10, Python, 561KB, 下载6次)

http://www.pudn.com/Download/item/id/1520686191708332.html