FPGA 是可编程芯片，因此FPGA 的设计方法包括硬件设计和软件设计两部分。硬件包括FPGA 芯片电路、
存储器、输入输出接口电路以及其他设备，软件即是相应的HDL 程序以及最新才流行的嵌入式C 程序。
目前微电子技术已经发展到SOC 阶段，即集成系统(Integrated System) 阶段，相对于集成电路(IC) 的设
计思想有着革命性的变化。SOC 是一个复杂的系统，它将一个完整产品的功能集成在一个芯片上，包括核心处
理器、存储单元、硬件加速单元以及众多的外部设备接口等，具有设计周期长、实现成本高等特点，因此其设
计方法必然是自顶向下的从系统级到功能模块的软、硬件协同设计，达到软、硬件的无缝结合。
这么庞大的工作量显然超出了单个工程师的能力，因此需要按照层次化、结构化的设计方法来实施。首先
由总设计师将整个软件开发任务划分为若干个可操作的模块，并对其接口和资源进行评估，编制出相应的行为
或结构模型，再将其分配给下一层的设计师。这就允许多个设计者同时设计一个硬件系统中的不同模块，并为
自己所设计的模块负责；然后由上层设计师对下层模块进行功能验证。
FPGA is a programmable chip, so the FPGA design method including hardware design and software design of two parts.The hardware includes the FPGA chip circuit,
Memory, input/output interface circuit, and other equipment, software is the corresponding HDL programs as well as the latest popular embedded C program.
The microelectronics technology has developed to the stage of SOC, namely Integrated System (Integrated System) phase, compared with the Integrated circuit (IC)
Thought has a revolutionary change.SOC is a complicated system, it will be a complete product function integrated on a chip, including the core
Bedding, storage unit, hardware acceleration unit as well as many peripheral interface, etc., has a long design cycle, make the cost is high, so the set
Meter method is necessarily top-down the system level to the function modules of collaborative design of software and hardware, to achieve a seamless combination of hardware and software.
So huge workload obviously beyond (2015-05-08, PDF, 6577KB, 下载5次)
本书比较系统地介绍了VHDL 的基本语言现象和实用技术全书以实用和可操作
为基点简洁而又不失完整地介绍了VHDL 基于EDA 技术的理论与实践方面的知识
其中包括VHDL 语句语法基础知识第1 章第7 章逻辑综合与编程技术第9 章
有限状态机及其设计第10 章基于FPGA 的数字滤波器设计第11 章多种常用
的支持VHDL 的EDA 软件使用介绍第12 章VHDL 数字系统设计实践介绍第13
章和大学生电子设计赛题的VHDL 应用介绍第14 章全书列举了大量VHDL 设
计示例其中大部分经第12 章介绍的VHDL 综合器编译通过第13 章的程序绝大部分
都通过了附录介绍的EDA 实验系统上的硬件测试可直接使用书中还附有大量程序
设计和实验/实践方面的习题
本书可作为高等院校的电子工程通信工业自动化计算机应用技术电子对抗
仪器仪表数字信号处理图像处理等学科领域和专业的高年级本科生或研究生的VHDL
或EDA 技术课程的教材及实验指导也可作为相关专业技术人员的自学参考书
VHDL for engineers (2013-10-29, PDF, 2813KB, 下载6次)
针对某船舶模型定位系统中调速电机，以FPGA(现场可编程门阵列)为控制器，采用数字比例积分调节器实现电机的速度控制算法，设计出数字化调速控制器
Positioning system for a ship model in the motor speed, the FPGA (field programmable gate array) for the controllers, proportional integral regulator with digital speed of the motor control algorithm, designed digital speed controller (2011-05-17, PDF, 111KB, 下载9次)
Verilog HDL 语言具有下述描述能力：设计的行为特性、设计的数据流特性、设计的结构
组成以及包含响应监控和设计验证方面的时延和波形产生机制。所有这些都使用同一种建模
语言。此外， Verilog HDL语言提供了编程语言接口，通过该接口可以在模拟、验证期间从设
计外部访问设计，包括模拟的具体控制和运行。
Has the following description of Verilog HDL language ability: the behavior of the design, the design characteristics of the data flow, composition and structure of the design included monitoring and design verification response delay and waveform generation mechanism. All use the same modeling language. In addition, Verilog HDL language provides a programming language interface, this interface can be through the simulation is externally accessible from the design during the design, including specific control and run the simulation. (2011-04-18, PDF, 3006KB, 下载2次)
利用FPGA可编程芯片及Verilog HDL语言实现了对直流电机PwM控制器的设计，对直流电机速度进行控制。介绍了用Verilog HDL语言编程实现直流电机PwM控制器的PwM产生模块、串口通信模块、转向调节模块等功能，该系统无须外接D／A转换器及模拟比较器，结构简单，控制精度高，有广泛的应用前景。同时，控制系统中引入上位机控制功能，可方便对电机进行远程控制。
Using FPGA programmable chip and Verilog HDL language for the design of DC motor PwM controller, DC motor speed control. Introduced with the Verilog HDL language programming controller PwM DC PwM generated module, serial communication module, steering adjustment module and other functions, the system is an external D/A converters and analog comparators, simple structure, high control precision, there a wide range of applications. Meanwhile, the introduction of PC control system control functions can be easily remote control the motor. (2010-04-03, PDF, 4168KB, 下载95次)
现场可编程门阵列（FPGA）已经不再单纯应用在芯片与系统之间的直接互联层，在软件无线电（SDR）中，FPGA逐渐用做通用运算架构来实现硬件加速单元，在降低成本和功耗的基础上提升性能表现。SDR调制解调器的典型实现包括通用处理器（GPP）、数字信号处理器（DSP）和FPGA。而且，FPGA架构可以结合专用硬件加速单元，用来卸载GPP或DSP。软核微处理器可以结合定制逻辑，扩展其内核，也可以将分立的硬件加速协处理器添加到系统中。此外，还可将通用布线资源放在FPGA中，这些硬件加速单元可以并行运行，进一步增强系统的整体运算输出能力
Field programmable gate array (FPGA) is no longer a simple chip and system used in the direct interconnection between the layers, in the Software Defined Radio (SDR) in, FPGA increasingly used as general-purpose computing architecture to achieve hardware acceleration units to reduce costs in and power consumption based on the performance upgrade. SDR modem to achieve a typical general-purpose processor, including (GPP), digital signal processor (DSP) and FPGA. Moreover, FPGA architecture can be combined with dedicated hardware acceleration units to uninstall GPP or DSP. Soft-core microprocessors can combine custom logic and to expand its core, it can be the separation of hardware-accelerated co-processor added to the system. In addition, resources can also be placed on general-purpose FPGA routing, these hardware acceleration units can be run in parallel, to further enhance the overall computing system, the output capacity (2009-07-05, PDF, 255KB, 下载36次)
本应用指南讲述 Spartan-3E 系列中的串行外设接口 (SPI) 配置模式。SPI 配置模式拓宽了
SpartanTM-3E 设计人员可以使用的配置解决方案。SPI Flash 存储器件引脚少、封装外形小而
且货源广泛。本指南讨论用 SPI Flash 存储器件配置 Spartan-3E FPGA 所需的连接，并且介绍
SPI 模式的配置流程。本指南还提供一种实用工具，用于在原型开发过程中对选定的
STMicroelectronics 和 Atmel SPI 器件进行在系统编程。
Application Guide on the Spartan-3E series of serial peripheral interface (SPI) configuration mode. SPI configuration mode broadened SpartanTM-3E designers can use to configure the solution. SPI Flash memory-pin small package and supply a wide range of small form factor. Discussed in this Guide SPI Flash memory with Spartan-3E FPGA configuration required to connect, and introduced the SPI mode configuration process. This guide also provides a practical tool for the prototype development process in selected STMicroelectronics and Atmel SPI programmable devices in the system. (2009-05-04, PDF, 363KB, 下载161次)