[VHDL/FPGA/Verilog] DDS-verilog
DDS是直接数字式频率合成器（Direct Digital Synthesizer）的英文缩写，是一项关键的数字化技术。与传统的频率合成器相比，DDS具有低成本、低功耗、高分辨率和快速转换时间等优点，广泛使用在电信与电子仪器领域，是实现设备全数字化的一个关键技术。文件写了一个DDS的例程，并编写了TB文件。
DDS is a direct digital synthesizer (Direct Digital Synthesizer) of the English abbreviation, is a key digital technology. Compared with the traditional frequency synthesizer, DDS has the advantages of low cost, low power consumption, high resolution and fast conversion time. It is widely used in the field of telecommunication and electronic instrument, which is a key technology to realize the whole digitization of equipment. The file was written with a DDS routine and a TB file was written. (2017-04-24, Windows_Unix, 2KB, 下载9次)
[LabView编程] LED-waveflow
labview8.5编写的led闪烁，波形显示源码
labview8.5编写的led闪烁，波形显示源码
labview8.5 led wareflow (2016-11-19, Windows_Unix, 1541KB, 下载2次)
[DSP编程] MY-CPU-TIME0-INT0
DSP定时器产生可调脉冲波形.本程序在CCS4.2中测试过
DSP timer generate adjustable pulse waveform
(2014-12-30, Windows_Unix, 731KB, 下载4次)
[VHDL/FPGA/Verilog] hsk4571_sgna_generator
信号发生器的VHDL实现，可调节波形及频率，方波、锯齿波、三角波等，在QUATTUS||9.0下编写，可在9.0及以上版本运行并下载，芯片为Altera的Cyclone3 EP3C8T144
Signal Generator VHDL implementation, adjustable waveform and frequency, square wave, sawtooth, triangle, etc., in QUATTUS | | 9.0 under preparation, can be run in the 9.0 and above versions and download, chips for Altera s Cyclone3 EP3C8T144 (2013-05-25, Windows_Unix, 9499KB, 下载5次)
[单片机开发] smart-device
关于智能仪器的课件，主要运用示波器，函数信号发生器，连接电路
About the intelligent instrument courseware, mainly using oscillograph, function signal generator, connection circuit
(2012-11-22, Windows_Unix, 14995KB, 下载5次)
[单片机开发] aaa
简单的示波器程序，有四种基本的波形， 适合初学者学习
simple Oscilloscopes procedure has four basic waveform, suitable for beginners to learn (2012-05-18, Windows_Unix, 110KB, 下载3次)
[单片机开发] CH35XDRV
测试用文档本设计主要由数字信号发生器和逻辑分析仪组成，其中数字信号发生器运用了89C51单片机系统，可以重复输出8路循环逻辑移位序列，逻辑分析仪用了89C55单片机系统，可以实现8路信号的采
test file http://googleads.g.doubleclick.net/pagead/ads?client=ca-pub- (2012-02-23, Windows_Unix, 502KB, 下载7次)
[VHDL/FPGA/Verilog] cpld
基于CPLD的PWM信号发生器，产生占空比可调的PWM波。
cpld pwm (2011-05-12, Windows_Unix, 871KB, 下载23次)
[嵌入式/单片机/硬件编程] BK-Function-Guidebook
BK-Function-Generator-and-AWG-Guidebook 一个基于DDS原理的函数发射器的guidebook 希望有所帮助
BK-Function-Generator-and-AWG-Guidebook DDS based on the principle functions of a transmitter guidebook want to help (2011-03-28, Windows_Unix, 1783KB, 下载3次)
[Linux/Unix编程] P101KHZ
P1.0输出1KHZ波形，非常实用，P1.0输出1KHZ波形，非常实用，P1.0输出1KHZ波形，非常实用，
P1.0 output waveform 1KHZ (2010-12-16, Windows_Unix, 553KB, 下载3次)
[VHDL/FPGA/Verilog] System_Generator_Pro
采用SystemGenerator实现信号发生器
achieve signal source with SystemGenerator (2010-11-11, Windows_Unix, 2609KB, 下载5次)
[单片机开发] S
用汇编语言编写的单片机中的音调发生器程序。
Microcontroller in assembly language programs in the tone generator. (2010-04-26, Windows_Unix, 1KB, 下载5次)
[软件设计/软件工程] RF_Crypt_Tools_v0.4
this tools is for convert rfs to rft to dds, so you can edit dds in rf oline file
this tools is for convert rfs to rft to dds, so you can edit dds in rf oline file (2009-07-11, Windows_Unix, 24KB, 下载5次)
[VHDL/FPGA/Verilog] cw
用ip核设计的信号发生程序，altera的用ip核设计的信号发生程序，altera的用ip核设计的信号发生程序，altera的用ip核设计的信号发生程序，altera的用ip核设计的信号发生程序，altera的用ip核设计的信号发生程序，altera的用ip核设计的信号发生程序，altera的
signal source for altera by ip coresignal source for altera by ip coresignal source for altera by ip coresignal source for altera by ip coresignal source for altera by ip coresignal source for altera by ip core (2009-06-18, Windows_Unix, 12246KB, 下载4次)
[Windows编程] ddssim
this is the waveforms to dds format
this is the waveforms to dds format (2009-05-06, Windows_Unix, 31KB, 下载2次)
[嵌入式/单片机/硬件编程] AD9833
ADI公司DDS芯片AD9833应用资料
ADI Corporation DDS chip AD9833 Application information (2008-05-09, Windows_Unix, 288KB, 下载128次)
[单片机开发] AD9831
ADI公司DDS芯片AD9831应用资料 (2008-05-09, Windows_Unix, 141KB, 下载61次)
http://www.pudn.com/Download/item/id/457777.html[嵌入式/单片机/硬件编程] AD9830
ADI公司DDS芯片AD9830应用资料
ADI Corporation DDS chip AD9830 Application information (2008-05-09, Windows_Unix, 184KB, 下载67次)
[嵌入式/单片机/硬件编程] five_MCU_sourece
5个单片机程序。TCP_IP.c带注解.rar：凌阳单片机的。dds.c51.rar：51单片机
five SCM procedures. TCP_IP.c annotated. Rar : Sunplus SCM. Dds.c51.rar : 51 MCU (2006-04-19, Windows_Unix, 2766KB, 下载47次)
[VHDL/FPGA/Verilog] 相位差可调的双通道信号发生器的设计
相位差可调的双通道信号发生器的设计,可以作为信号源用
phase difference adjustable dual-channel signal generator, we can use as a signal source (2005-09-07, Windows_Unix, 302KB, 下载57次)