美国名校的嵌入式课程讲义，多核cpu、内存、vliw指令等方面的设计原理
U.S. elite embedded lecture notes, multicore cpu, memory, vliw instruction and other aspects of design principles (2013-07-07, C/C++, 136KB, 下载6次)
多功能数字钟 24小时计时 整点报时功能 闹钟设置功能 校时 复位等
Multi-function digital clock 24 hours to strike the alarm clock on the hour function when the reset function, etc (2012-01-05, VHDL, 2KB, 下载6次)
电子数字钟，周期为24小时，显示满刻度为23时59分59秒，另外还具有校时功能和闹钟功能
Electronic digital clock, 24-hour period, indicating full scale as 23:59:59, when the school also has a function and alarm functions (2011-05-24, VHDL, 44KB, 下载6次)
数字时钟，可以实现(1) 显示日期功能（年、月、日、时、分、秒以及）
(2) 可通过按键切换年、月、日及时、分、秒的显示状态
(3) 可随时调校年、月、日或时、分、秒
(4) 可每次增减一进行时间调节
(5) 可动态完整显示年份，实现真正的万年历显示
(6) 可显示温度
Digital clock, can be achieved (1) the date function (year, month, day, hour, minute, seconds as well) (2) through the key switch the year, month, day in a timely manner, minute, second display state (3) at any time adjust the year, month, day or time, minutes, seconds (4) can be added or deleted, a time adjustment (5) can be dynamically complete display Year, the real calendar display (6) to display temperature (2012-10-15, Others, 231KB, 下载6次)
这时一个关于数字钟的VHDL程序，有计时、校时、报时等功能
When a digital clock on the VHDL program, there is time, school time, timer and other functions (2009-09-22, VHDL, 79KB, 下载6次)
数字钟的VHDL源程序，可以实现校时，校分等功能，并在试验箱上运行成功
The VHDL source code digital clock, you can achieve at school, school grade features, and success in the chamber is running on (2009-04-08, VHDL, 303KB, 下载6次)
VHDL的数字时钟程序
24小时计数显示；
具有校时功能（时，分） ；
实现闹钟功能（定时，闹响）；
VHDL digital clock counting procedures showed that 24 hours with a school function (hours, minutes) the realization of an alarm clock function (timing, downtown ring) (2009-01-08, VHDL, 12KB, 下载6次)
用VHDL实现的完整数字钟代码，时分秒计时、校时、整点仿电台报时。
Used to achieve a complete VHDL code digital clock, accurate time at school, the whole point of imitation time radio. (2009-05-21, VHDL, 288KB, 下载5次)
数字钟的VHDL源程序，可以实现校时，校分等功能，并在试验箱上运行成功
The VHDL source code digital clock, you can achieve at school, school grade features, and success in the chamber is running on (2009-04-08, VHDL, 302KB, 下载5次)
数字钟的电路图.1.显示时、分、秒。2. 可以24小时制或12小时制。3. 具有校时功能，可以对小时和分单独校时，对分校时的时候，停止分向小时进位。校时时钟源可以手动输入或借用电路中的时钟。4. 具有正点报时功能，正点前10秒开始，蜂鸣器1秒响1秒停地响5次。
Digital clock circuit diagram (2012-02-21, VHDL, 943KB, 下载5次)
用VHDL语言编写数字钟的程序，实现数字钟的完整功能，如计时、校时、闹钟和整点报时
Digital clock using VHDL language programs, digital clock several functions, such as timing, timing, alarm and hourly chime (2012-01-08, Others, 386KB, 下载5次)
1) 计时计数器用24进制计时器电路。
2) 可手动校时，能清零及分别进行时、分、秒的校正。
3) 可整点报时，扬声器发出时长为1s的信号。
4) 可设置闹钟功能。当计时计到预定时间时，扬声器发出闹铃信号，可控制闹铃时长。
clock (2010-12-17, VHDL, 844KB, 下载5次)
基于CPLD的交通灯控制，完成交通灯的功能，校错能力
CPLD-based control of traffic lights, traffic lights to complete the function, the school was wrong capacity (2010-10-08, VHDL, 426KB, 下载5次)
数字钟，用VHDL 编写。具有计时，校时（调分调时），报时功能
Digital clock, written with VHDL. With time, school time (when the tone on tones), timekeeping function (2010-09-02, VHDL, 188KB, 下载5次)
VerilogHDL编译基本功能具有“秒”、“分”、“时”计时功能，小时按24小时制计时。具有校时功能，能对“分”和“小时”进行调整。扩展功能
仿广播电台正点报时。在59分51秒、53秒、55秒、57秒发出低音512Hz信号，在59分59秒时发出一次高音1024Hz信号，音响持续1秒钟，在1024Hz音响结束时刻为整点。
定时控制，其时间自定；
可任意设定时间的闹钟
自动报整点小时数
小时显示：可切换12小时/24小时显示
VerilogHDL compile the basic functions of a " second" , " division" and " when" time function, hour by 24-hour time. When a school function, can " divide" and " hours" to adjust. Radio extension punctual timekeeping imitation. In 59 minutes and 51 seconds, 53 seconds, 55 seconds, 57 seconds sent the bass 512Hz signal, in 59 minutes and 59 seconds to issue a Treble 1024Hz signal, sound for 1 second, the end of the 1024Hz sound time for the whole point. Timing control, its time to custom can be arbitrarily set the time automatically report the whole point of the alarm clock an hour for several hours show: switchable 12 hours/24 hours display (2010-06-20, VHDL, 1KB, 下载5次)
DE2平台上实现的数字钟，包含时、分、秒的24小时制时间系统，有校时，准点报时，整点广播等功能。
DE2 platform digital clock, contains, minutes, seconds, 24-hour time system, school, prospective point of time, the whole point of broadcasting. (2013-01-05, Others, 1111KB, 下载5次)
多功能时钟，具有正常显示，校时，整点报时，闹钟功能。
Multi-function clock, with a normal school, the whole point timekeeping, alarm clock function. (2012-11-26, VHDL, 470KB, 下载5次)
基于VHDL的数字时钟课程设计，可实现校时、计时已经闹钟功能。
The course design of digital clock based on VHDL can realize the alarm clock function of school hour and time. (2018-12-25, VHDL, 186KB, 下载5次)
该程序主要是用Verilog HDL语言编写的多功能数字钟，包括校时，调试，整点报时和万年历模块。
The program is mainly used Verilog HDL language multifunction digital clock, including at school, debugging, the whole point timekeeping and calendar modules. (2016-05-14, VHDL, 9KB, 下载5次)
verilog电子时钟，可以实现复位、计时、校时、闹钟等多种功能。
verilog electronic clock, you can achieve a variety of functions reset, time, school, alarm clock and so on. (2013-12-12, VHDL, 363KB, 下载5次)