虚拟逻辑分析仪
版本:LabVIEW 8.0
Description:
The Virtual Logic Analyzer is a development tool for monitoring VI execution. It is especially useful for optimizing the performance of multi-threaded, parallel applications. Monitoring Data and Timing information over an entire application can provide unexpected insight into performance bottlenecks. The VLA Probes use the OOP model Stepan Riha of NI introduced at NIWeek 97 and the Virtual Logic Analyzer concept is based on the presentation "Monitoring the Control and Timing of VIs" by Dana Redington at NIWeek95.
There are two parts to the Virtual Logic Analyzer: Probes, and the GUI interface. Probes are meant to be as efficient as possible, but do not place them in a MHz type loop. Instead place them in strategic locations where you can monitor program flow. Each VLA Probe is a reentrant vi that monitors your program s execution by timestamping data during program execution. Simply place this vi on your block diagram and connect the required Tag and Data inputs. Reme (2011-08-17, LabView, 434KB, 下载22次)