%E6%A0%A1%E6%97%A0%E5%BF%A7 下载搜索联合开发网

排序：按匹配按投票按下载次数按上传日期

按平台查找： All HTML(5)

[VHDL/FPGA/Verilog] traffic-light

一个用VHDL为FPGA Nexys A7制作的红绿灯项目。
A project for a traffic light made in VHDL for FPGA Nexys A7. (2023-03-29, HTML, 398KB, 下载0次)

http://www.pudn.com/Download/item/id/1680086131644485.html

[VHDL/FPGA/Verilog] VHDLTrafficLight

用Vivado VHDL为Nexys A7编写的双向红绿灯
Two way traffic light written in Vivado VHDL for Nexys A7 (2019-04-12, HTML, 697KB, 下载0次)

http://www.pudn.com/Download/item/id/1555077353660293.html

[VHDL/FPGA/Verilog] Nexys-A7-myKeyBoard

用于将键盘连接到Nexys A7并实现简单计算器的verilog代码
verilog code for connecting keyboard to Nexys A7 and implementing a simple calculator (2019-12-06, HTML, 4583KB, 下载0次)

http://www.pudn.com/Download/item/id/1575605098763804.html

[VHDL/FPGA/Verilog] verilog

FPGA Nexys A7板的Verilog代码
Verilog code for FPGA Nexys A7 Board (2022-05-26, HTML, 11988KB, 下载0次)

http://www.pudn.com/Download/item/id/1653510939167099.html

[VHDL/FPGA/Verilog] FPGA-WallClock

在Nexys A7 100T FPGA上实现的高精度数字时钟，配有可调节的显示亮度和时间...
High accuracy digital clock implemented on a Nexys A7 100T FPGA complete with adjustable display brightness and time controls including reset, and time setting. (2021-04-30, HTML, 2277KB, 下载0次)

http://www.pudn.com/Download/item/id/1619781360619295.html

总计:5