Rich text layout library, stars:97, update:2024-04-20 21:27:36 (2024-04-22, Rust, 0KB, 下载0次)
http://www.pudn.com/Download/item/id/1713726908972097.html
该储存库用于设计用于检测气体泄漏的气体探测器系统。该系统使用连接到Arduino板的引脚A0的模拟气体传感器。它包括用于视觉指示的LED和用于声音警报的蜂鸣器。此外，它通过串行监视器提供适当的状态消息。
This repository is for a gas detector system designed for detecting gas leaks. The system uses an analog gas sensor connected to pin A0 of the Arduino board. It includes LEDs for visual indication and a buzzer for audible alerts. Additionally, it provides appropriate status messages through the serial monitor. (2024-03-18, C++, 0KB, 下载0次)
超大规模集成电路A1
VLSI A1 (2024-03-13, Others, 0KB, 下载0次)
该项目是CSE 462M计算机系统设计的一部分。它涉及使用VHDL、ExpressSCH和ExpressPCB设计和实现具有CMOD A7 FPGA模块的四层板。
This project was completed as a part of CSE 462M Computer Systems Design. It involved designing and implementing a four-layer board with a CMOD A7 FPGA module using VHDL, ExpressSCH, and ExpressPCB. (2024-03-07, VHDL, 0KB, 下载0次)
在Nexys A7上实现的测试台设计
Testbench design implemented on Nexys A7 (2023-12-16, Verilog, 0KB, 下载0次)
Arty A7板上使用DDR3 RAM的MicroBlaze硬件设计教程；DDR3 RAM速度测试应用程序
Tutorial of a HW design of MicroBlaze using DDR3 RAM on Arty A7 board; DDR3 RAM speed test application (2023-11-27, C, 0KB, 下载0次)
2023年春天，我为HDL类编写了代码，涵盖Verilog和Nexys A7-100T FPGA编程。，
Code I did in the spring of 2023 for my HDL class covering Verilog and programming the Nexys A7-100T FPGA., (2023-10-08, Others, 0KB, 下载0次)
旧版本Redmine的主题。基于原始A1，但添加了基于媒体查询的移动布局。，
A theme for an old version Redmine. Based on the original A1, but adds a media query based mobile layout., (2012-05-29, JavaScript, 0KB, 下载0次)
这个存储库是我使用Verilog编程之旅的目录。所有工作都是通过Nexys A7 FPGA训练器板和Viv...，
This repository is a catalogue of my programming journey with Verilog. All work was done with the Nexys A7 FPGA Trainer Board and the Vivado Design Suite (2023-09-21, Tcl, 0KB, 下载0次)
用于Hackintosh的EFI:Huanzhi F8（C612芯片组）、Intel Xeon E5-26XX V3（Haswell HEDT）和RX 5500 XT 4Gb或其他兼容GPU。，
EFI for Hackintosh: Huananzhi F8 (C612 Chipset), Intel Xeon E5-26XX V3 (Haswell HEDT) and RX 5500 XT 4Gb or others compatible GPUs., (2023-05-08, Others, 0KB, 下载0次)
申请闪存和转储分区，禁用Google FRP，ADB远程访问中兴刀片V9 Vita、中兴刀片A7 Vita和其他智能...，
Application for flash and dump partitions, disable Google FRP and remote by ADB for ZTE Blade V9 Vita, ZTE Blade A7 Vita and other smartphones on Qualcomm chipset (like as emmcdl tool) (2020-12-21, C#, 0KB, 下载0次)
rtl8814au芯片组无线适配器的驱动程序（D-Link DWA-192 rev A1），
Drivers for the rtl8814au chipset wireless adapters (D-Link DWA-192 rev A1), (2023-01-19, C, 0KB, 下载0次)
97-98第一学期VLSI，Jahanian博士，
97-98 first semester VLSI by Dr. Jahanian, (2019-01-01, VHDL, 0KB, 下载0次)
Keerthan Nayak，Ryan Fallis，Richard的ECE 540 SOC设计最终项目，
ECE 540 SOC design final project by Keerthan Nayak, Ryan Fallis, Richard, (2022-01-03, VHDL, 0KB, 下载0次)
这是一个包含基于ARM-Cortex-M0的SOC设计的回购，在Nexus-4-DDR、Nexus-4和ARTY-A7 FPGA平台上实现。，
This is a repo containing ARM-Cortex-M0 based SOC designs implemented on the Nexus-4-DDR , Nexus-4 and the ARTY - A7 FPGA platforms., (2023-09-06, Verilog, 0KB, 下载0次)
具有MAX4619故障电路的Xmega-A1 Xplained板的软件，
Software for Xmega-A1 Xplained board with MAX4619 glitch circuit, (2017-01-27, C, 0KB, 下载0次)
本项目专注于使用Nexys A7 FPGA采用自顶向下的方法设计秒表电路，其中我们从了解......开始...，
This project is focused on the design of a stopwatch circuit using a top-down approach using Nexys A7 FPGA, where we start by understanding the design process by which we clearly define the problem to be solved, outlined the functions of a desired circuit, and then combined digital building blocks to realize the desired function of the circuit. (2022-04-25, HTML, 0KB, 下载0次)
Merupakan pemenuhan Tugas Besar Praktikum PMC Kelompok 3 Rombongan A1。，
Merupakan pemenuhan Tugas Besar Praktikum PMC Kelompok 3 Rombongan A1., (2019-04-12, C, 0KB, 下载0次)
M5Atom的JJY模拟器，
JJY Simulator for M5Atom, (2023-04-27, C++, 0KB, 下载0次)
使用数据表中的信息最少实现用于STM32的RPLIDAR A1驱动程序，
A minimal implementation of an RPLIDAR A1 Driver for STM32 using the informations in the datasheet, (2022-05-29, C, 0KB, 下载0次)