[VHDL/FPGA/Verilog] clockv

使用Verilog语言编写的数字钟程序.有慢校时,快校时,闹钟等功能.
use Verilog language prepared by the digital clock procedures. Schools are slow, quick school, alarm clock functions. (2006-06-02, Unix_Linux, 5KB, 下载47次)