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按平台查找All Verilog(121) 

[文章/文档] pg275-100m-1g-tsn-subsystem

xilinx tsn ip 手册 , 官网下载不到,分享给大家
xilinx tsn ip product guide (2023-06-23, Verilog, 1572KB, 下载0次)

http://www.pudn.com/Download/item/id/1687483343905462.html

[处理器开发] RISu064

双发RV64IM处理器,娱乐和学习
Dual-issue RV64IM processor for fun & learning (2023-01-18, Verilog, 6360KB, 下载0次)

http://www.pudn.com/Download/item/id/1687216133797698.html

[VHDL/FPGA/Verilog] whirlwind

任天堂娱乐系统(NES)兼容FPGA核心
Nintendo Entertainment System (NES) compatible FPGA core (2020-06-02, Verilog, 346KB, 下载0次)

http://www.pudn.com/Download/item/id/1591043164609882.html

[VHDL/FPGA/Verilog] fpga_nes

基于FPGA的任天堂娱乐系统仿真器
FPGA-based Nintendo Entertainment System Emulator (2022-06-28, Verilog, 1346KB, 下载0次)

http://www.pudn.com/Download/item/id/1656368807532644.html

[源码/资料] XAPP1289: Using DMA with MPSoC Controller for PCI

Xilinx官网此链接已失效,此为我磁盘备份,留给需要的人。 (2022-07-25, Verilog, 422KB, 下载0次)

http://www.pudn.com/Download/item/id/1658705520329103.html

[其他] AD7490

官网针对验证板的FPGA驱动代码,AD芯片采用12位AD7490
According to FPGA driver code of verification board, ad chip adopts 12 bit ad7490 (2020-12-02, Verilog, 3KB, 下载0次)

http://www.pudn.com/Download/item/id/1606872446564767.html

[通讯编程] 16_ethernet_test

基于FPGA的千兆以太网例程,通过以太网实现收发功能
Gigabit Ethernet routine based on FPGA (2020-06-12, Verilog, 8825KB, 下载8次)

http://www.pudn.com/Download/item/id/1591942673347581.html

[文章/文档] ug585-Zynq-7000-TRM

ZYNQ官网学习资料UG585, 技术手册
ug585, technical manual (2019-12-31, Verilog, 12622KB, 下载0次)

http://www.pudn.com/Download/item/id/1577776690183497.html

[VHDL/FPGA/Verilog] video_ethernet

基于FPGA,硬件平台:ALINX与PANGO合作的PGL22G开发板,软件平台:PDS。描述语言:verilog。千兆以太网视频传输实验。
Based on FPGA, hardware platform: pgl22g development board cooperated by alinx and Pango, software platform: PDs. Description Language: Verilog. Gigabit Ethernet video transmission experiment. (2019-11-19, Verilog, 5494KB, 下载3次)

http://www.pudn.com/Download/item/id/1574164651455347.html

[VHDL/FPGA/Verilog] qianzhaowang

一个简单的千兆以太网UDP协议的实现,可以实现数据的收发和ARP,实现PC端与FPGA的以太网通信
A simple implementation of Gigabit Ethernet UDP protocol can realize data sending and receiving and ARP, and realize Ethernet communication between PC and FPGA. (2019-01-21, Verilog, 29841KB, 下载12次)

http://www.pudn.com/Download/item/id/1548062293111764.html

[VHDL/FPGA/Verilog] src

以太网MAC数据链路层,在FPGA内用Verilog语言实现对应功能
Ethernet MAC layer,in FPGA, implement this function with verilog language (2018-08-07, Verilog, 60KB, 下载3次)

http://www.pudn.com/Download/item/id/1533656676295753.html

[VHDL/FPGA/Verilog] xapp1052

xilinx官网 xapp1052资料,用于AXI总线挂DMA,没有账号的可以这里下载了。
Xilinx official network xapp1052 data,For AXI bus hanging DMA. no account can be downloaded here. (2018-07-18, Verilog, 14045KB, 下载36次)

http://www.pudn.com/Download/item/id/1531883701439092.html

[文章/文档] SiI9022A9024A-DS-1076-C01

sil9022A/9024A HDMI Transmitter, datasheet
sil9022A/9024A HDMI Transmitter (2018-06-04, Verilog, 1554KB, 下载22次)

http://www.pudn.com/Download/item/id/1528084014555526.html

[VHDL/FPGA/Verilog] C5G_SRAM_RTL_Test

官网c5板子的SRAM工程,可以直接一直使用。
The SRAM project of official website C5 board can be used directly (2018-04-10, Verilog, 476KB, 下载1次)

http://www.pudn.com/Download/item/id/1523351860666180.html

[VHDL/FPGA/Verilog] xapp1052

赛灵思官方pcie例程,官网下载需要注册登录,这边给大家另一个选择
Xilinx PCIe official routines, the official website to download the required registration login, here give you another choice (2018-03-01, Verilog, 2811KB, 下载7次)

http://www.pudn.com/Download/item/id/1519885585733885.html

[通讯编程] 双向传输

用黑金开发板和以太网模块组合的千兆以太网双向传输程序
Gigabit Ethernet two-way transmission program with black gold development board and Ethernet module. (2018-01-30, Verilog, 12033KB, 下载8次)

http://www.pudn.com/Download/item/id/1517295145974143.html

[VHDL/FPGA/Verilog] ethernet_loopback

通过FPGA驱动千兆以太网口,完成SPARTAN6上的UDP数据包闭环测试,即通过网口发送数据包到FPGA,FPGA内部将接收到的数据返回到PC机,建议测试之前添加ARP静态绑定,FGPA内部的IP以及MAC地址在ROM里的COE文档里可以看到,发送端添加了CRC以及整体CHECKSUM的计算
Driven by FPGA Gigabit Ethernet port, UDP SPARTAN6 data packet on the closed loop test, through the network to send data packets to FPGA, FPGA will receive the data back to the PC, the proposed test before adding ARP static binding, FGPA internal IP and MAC address in the COE document in the ROM where you can see, the sender adds CRC and CHECKSUM integral calculation (2017-11-20, Verilog, 23381KB, 下载41次)

http://www.pudn.com/Download/item/id/1511144498493064.html

[网络编程] CH03_RGMII_UDP_TEST

基于RGMII的UDP网络数据通信,学习FPGA的千兆以太网通信
RGMII based UDP network data communication, learning FPGA Gigabit Ethernet communications (2017-09-11, Verilog, 5928KB, 下载56次)

http://www.pudn.com/Download/item/id/1505142259538914.html

[嵌入式/单片机/硬件编程] 19_ethernet_test_RGMII

以太网FPGA程序 verilog ise开发
ethernet_test_RGMIIx verilog (2017-07-27, Verilog, 27013KB, 下载49次)

http://www.pudn.com/Download/item/id/1501126587366493.html

[VHDL/FPGA/Verilog] N25Q064A13E_VG12

nand flash 仿真模型,官网下载,希望对大家有用
This software code and all associated documentation, comments or other information (collectively "Software") is provided "AS IS" without warranty of any kind. (2017-07-23, Verilog, 133KB, 下载13次)

http://www.pudn.com/Download/item/id/1500824662678484.html
总计:121