systemverilog编程资料，用于验证
doc of systemverilog, for chip verification (2018-03-19, Verilog, 54233KB, 下载107次)
一些对初学者比较实用的源码，ASK，PSK，FSK调制解调
Some of the more practical source code for beginners (2017-10-15, Verilog, 1251KB, 下载52次)
在开发板EGO1上实现的小鸟游戏，有详细地模块说明，使用vivdao平台实现
Bird board game on the development board EGO1, a detailed module description, the use of vivdao platform (2017-12-13, Verilog, 510KB, 下载47次)
其中包括AD9226的原理图和应用程序，可以参考完成其他编程
Including AD9226 schematics and applications, you can refer to complete other programming (2017-11-27, Verilog, 5844KB, 下载44次)
利用Verilog语言，在PFGA中实现对16位DA芯片AD5761的输出电压进行或編程设置
Using Verilog language, the output voltage of 16 bit DA chip AD5761 is programmed or programmed in PFGA (2017-10-24, Verilog, 1KB, 下载38次)
对ADI公司的AD9959芯片编程，实现SPI通信
ADI company AD9959 chip programming, SPI communication (2017-08-02, Verilog, 1216KB, 下载34次)
adv7123是常用的视频解码器，常常可用fpga编程控制，使其输出ntsc、pal制式，或者vga显示，这里面全是关于这方面的论文，很值得借鉴参考。
Adv7123 is a commonly used video decoder. It can often be controlled by FPGA programming, so that it can output NTSC, PAL format or VGA display, which is all about the papers in this area, so it is worth learning from for reference. (2018-01-20, Verilog, 17111KB, 下载30次)
实现了MASH111功能，输入位数可编程
MASH 1-1-1, delta-sigma , input bits are programmable (2018-05-08, Verilog, 1476KB, 下载29次)
数字信号处理的FPGA实现，内含丰富的VHDL和Verilog编程实例。
Digital signal FPGA implementation, rich in VHDL and Verilog programming examples. (2018-07-11, Verilog, 7011KB, 下载24次)
使用Verilog 编程语言实现对11 bit 编码器SSI输出的读取
Use Verilog to read encoder,it's 11 bit and SSI output (2018-04-27, Verilog, 2KB, 下载22次)
使用Altera FPGA平台，Verilog编程语言，编写步进电机驱动程序，已在开发板上验证；
on altera fpga flatform, use verilog language, driving stepmotor, and test ok. (2017-10-08, Verilog, 300KB, 下载20次)
用Verilog语言编程实现4位BCD计数器的功能
Write the programm with Verilog language to implement the function of 4 - bit BCD counter. (2018-04-11, Verilog, 25KB, 下载14次)
串口接收模块，可以通过parameter，参数化配置传输速率、传输位宽和校验。采用Verilog语音编程实现。使用者根据串口的要求配置好参数，并根据缓冲的大小配置FIFO就可以使用。对帧错误（停止位不为高），检验错误和读FIFO超时（FIFO满的情况下，有新的数据到）等现象进行了检查。
UART serial receiver module, through parameter, configuration parameters of the transmission rate, Data width and parity. Using Verilog. The user configured the parameters according to the serial port and configured FIFO according to the size of the buffer. The frame error (stop bit is not high), check errors, and read FIFO timeout (when FIFO is full,and new data come) and so on are examined. (2017-07-21, Verilog, 4KB, 下载14次)
这是一个使用Vivado开发，使用Verilog编程实现，包含testbench和约束文件。
This is a program developed by using Vivado platform. Using Verilog programming, including testbench and constraint files. (2018-05-22, Verilog, 903KB, 下载13次)
对AD7656采集的数据进行放大，跨时钟域转换，通过SRAM缓存输出
Amplify the data collected by the AD7656, convert across the clock domain, and output through the SRAM buffer. (2018-07-12, Verilog, 7KB, 下载12次)
非常好的verilog语言介绍学习工具，适和刚开始学习FPGA编程的同学。
Verilog Language Introduction Learning Tool, Suitable for students who have just begun to learn the programming of FPGA. (2018-12-20, Verilog, 1639KB, 下载11次)
Xilinx FPGA Verilog 编程大全（2015网络版）
Xilinx FPGA Verilog Programming Encyclopedia (2015 online version) (2019-11-13, Verilog, 16405KB, 下载11次)
fpga搭建sopc,驱动oled显示，用的是Verilog语言编程的
FPGA build SOPC, drive OLED display, using the Verilog programming language (2017-07-29, Verilog, 19KB, 下载11次)
用Verilog编程，基于FPGA的小游戏，七段数码管上计算数学式，VGA上控制小球避障
A game based on FPGA, using Verilog. (2019-02-27, Verilog, 2517KB, 下载10次)