扫描显示电路 用于七段数码管的扫描显示，是fpga编程的基础，有助于从事可编程逻辑器件的学习
Scan display circuit for the seven-segment LED display scan is based fpga programming, programmable logic devices will help in learning (2011-05-13, VHDL, 3KB, 下载2次)
15进制计数器 每计数十五次有一个进位，是vhdl编程的基础程序，应用于fpga cpld可编程逻辑器件
Fifth decimal counter 15 counts each have a carry, is the basis for vhdl programming procedures, programmable logic devices used in fpga cpld (2011-05-13, VHDL, 1KB, 下载8次)
10进制计数器 每计数十次有一个进位，是vhdl编程的基础程序，应用于fpga cpld可编程逻辑器件
Total scores of 10 binary counter has a per carry, is the basis for vhdl programming procedures used in programmable logic devices fpga cpld (2011-05-13, VHDL, 1KB, 下载4次)
近年来，随着电子系统设计自动化和超大规模可编程逻辑器件的快速发展，一类新型电子系统开发工具正在迅速普及，计算机设计和编程人员和电子器件厂家都在寻找一种工具，可以在芯片的设计人员和生产伙伴之间建立沟通和交换数据的桥梁。
In recent years, with the electronic system design automation and ultra-large-scale rapid development of programmable logic devices, a new type of electronic system development tools are growing in popularity, computer design and programming and electronics manufacturers are looking for a tool that can chip the design and production partners to establish a bridge of communication and exchange of data. (2010-05-18, VHDL, 3KB, 下载1次)
本文首先介绍了稀疏矩阵的特点和研究稀疏矩阵分解的意义，接着讨论了稀疏矩阵各种快速算法并给出了本文所采用的方法。在此基础上详细说明了稀疏矩阵模拟排序算法，直接LU分解算法，符号LU分解算法，数值LU分解算法及这些算法在FPGA上的实现过程。最后为充分发挥FPGA作为一种可编程逻辑器件的优势，将单核数值LU分解扩展为多核并行LU分解结构，并使用BDB矩阵对该结构进行了验证，给出并分析了实验结果。
Firstly,the characteristies and research value of sparse matrix are introduced．Then we describe various methods that have been explored in the past for speeding-up the
process of LU factorization，on the basis of which our designs al e presented including
sparse ordering methods，LU factorization，symbolic LU factorization,numerical LU factorization and their realization based on FPGA．Finally,by taking advantage of FPGA resources we implement a parallel LU factorization which iS verified by BDB sparse matrix and we analyze the experimental results
(2010-03-25, VHDL, 4177KB, 下载17次)
给出系统的整体框架设计和各模块的实现，包括芯片的选择、各模块之间的时序以及控制、每个运算模块详细的工作原理和算法设计流程；通过VHDL语言编程来实现浮点数的加减、乘除和开方等基本运算功能；在Xilinx ISE环境下，对系统的主要模块进行开发设计及功能仿真，验证
了基于FPGA的浮点运算。
The overall framework of system design and realization of each module which contain selection of chip，timing and control between modules，detailed principle and design process of algorithm for each module were all described；The basic calculating functions of floating-point numbers，such as addition, subtraction，multiplication，division and extraction were implemented with VHDL. In the circumstance of Xilinx ISE，the development and functional simulation for main modules of system were accomplished，and then floating point calculation based on FPGA Was confirmed (2010-03-25, VHDL, 3407KB, 下载16次)
首先介绍了防抖型矩阵式键盘的整体设计思路,然后采用模块化设计方法对各个电路用VHDL进行设计,最后进行顶层文件设计和仿真,并用PLD器件下载验证.整个电路具有故障率低、使用灵活、便于修改、在系统可编程性及可移植性强等优点.
First introduced the anti-shake-type matrix keyboard' s overall design concept, and then use a modular design approach to the various circuits VHDL design, last, top-level document design and simulation, and verification using PLD device to download. The whole circuit has a failure rate is low, the use of flexible, easy to modify, in the system programmability and portability strong advantages. (2010-03-14, VHDL, 490KB, 下载4次)
本设计是用VHDL语言来实现的基于RS232按位串行通信总线的行列式矩阵键盘接口电路，具有复位和串行数据的接收与发送功能，根据发光二极管led0—led2的显示状态可判断芯片的工作情况；实现所有电路功能的程序均是在美国
ALTERA公司生产的具有现场可编程功能的芯片EPM7128SLC84-15上调试通过的。该电路的设计贴近生活，实用性强，制成芯片后可作为一般的PC机键盘与主机的接口使用。
The design is based on VHDL language to achieve bit serial RS232 communication bus according to the determinant of matrix keyboard interface circuit with a reset, and serial data reception and transmission capabilities, according to light-emitting diode display led0-led2 status can be judged chip work to achieve all the circuit functions of the program are produced in the United States has ALTERA Field Programmable functions EPM7128SLC84-15 on-chip debug passed. The circuit design of daily life, practical, post-produced chips can be used as a general PC, the keyboard and the host interface. (2010-03-14, VHDL, 66KB, 下载9次)
采用以FPGA为核心的扫描控制电路，通过MCU提取的数据，经高频率的FPGA处理后送到驱动电路进行显示，既简化了软件编程，也保 证了大屏幕LED的刷新速率。
To adopt a FPGA as the core of the scan control circuit, through the MCU data extracted by high-frequency FPGA treatment sent to the drive circuit to display not only simplify software programming, but also to ensure a large LED screen refresh rate. (2010-01-15, VHDL, 227KB, 下载4次)
基于EDA技术的函数发生器的设计,用VHDL语言编程
the design of signal generating device with VHDL (2010-01-05, VHDL, 542KB, 下载3次)
介绍集成开发环境Quartus II的用法及VHDL的编程技术
Introduced Quartus II integrated development environment and the usage of VHDL programming techniques (2009-12-26, VHDL, 6KB, 下载3次)
dds实现波形的生成，采用vhdl语言编程实现
dds achieve waveform generation, the use of VHDL programming language implementation (2009-03-26, VHDL, 268KB, 下载1次)
:文章针对目前数字信号处理中大量采用的快速傅立叶变换[FFT] 算法采用软件编程来处理的应用现状,在对FFT 算法进行
分析的基础上,给出了用FPGA[Field Programmable Gate Array] 实现的8 点32 位FFT 处理器方案,并得到了系统的仿真结果。
最后在Altera 公司FLEX10K系列FPGA 芯片上成功地实现了综合。
Based on the analysis of the FFT algorithm , a reasonable logic structure for a 8-point ,32- bit FFT processor is described and the simulating
result is given in this paper. The processor is implemented on the FLEX10Kfamily of FPGAs. (2009-02-17, VHDL, 215KB, 下载38次)
手把手教你用可编程逻辑器件实现脉宽调制,简单容易，一学就会~（转载的）
手把手教programmable logic device you use to achieve pulse-width modulation, simple and easy, a study will be ~ (reproduced) (2008-12-11, VHDL, 133KB, 下载9次)
可编程逻辑器件与应用专题(清华)
可编程逻辑器件与应用专题(清华)
Programmable logic devices and application of the topic (Tsinghua) programmable logic devices and application of the topic (Tsinghua) (2008-11-26, VHDL, 573KB, 下载2次)
设计了一基于现场可编程门阵列（FPGA）的低频数字式相位测量仪。该测量仪包括数字式移相信号发生器和相位测量仪两部分，分别完成移相信号的发生及其频率、相位差的预置及数字显示、发生信号的移相以及移相后信号相位差和频率的测量与显示几个功能。其中数字式移相信号发生器可以产生预置频率的正弦信号，也可产生预置相位差的两路同频正弦信号，并能显示预置频率或相位差值；相位测量仪能测量移相信号的频率、相位差的测量和显示。两个部分均采用基于FPGA的数字技术实现，使得该系统具有抗干扰能力强, 可靠性好等优点。 (2008-05-10, VHDL, 590KB, 下载174次)
http://www.pudn.com/Download/item/id/458481.html