[操作系统开发] fifo
同步FIFO设计一个同步FIFO，该FIFO深度为16，每个存储单元的宽度为8位，要求产生FIFO为空、满、半满、溢出标志。请采用可综合的代码风格进行编程。
Synchronous FIFO design a synchronous FIFO, the FIFO depth is 16, the width of each memory cell is 8, required to generate the FIFO is empty, full, half full, the overflow flag. Please use the code can be integrated programming style. (2013-12-23, VHDL, 1KB, 下载2次)
[操作系统开发] AD7864
这是对上次AD7864采样程序的改进，增加了FIFO的编程，功能比上次源码更加完善！
This sourse is modified and I have added the program of FIFO,so its function is better then privious one.I hope it is helpful for you! (2009-10-12, VHDL, 753KB, 下载57次)
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