在这个存储库中，我使用Verilog介绍了一个2级流水线Risc-V处理器的实现，并与它一起构建了一个汇编程序，以使编写程序变得更容易，因此您可以在指令存储器上编写程序并执行它。
In this repository, I introduced an implementation of a 2-stage pipelined Risc-V Processor using Verilog and built an Assembler along with it to make it easier to write programs so you can write them on the instruction memory and execute it. (2024-04-05, Verilog, 0KB, 下载0次)
采用verilog编程，步进电机开环控制。
Verilog programming is adopted, and the stepper motor is controlled by open loop. (2021-01-04, Verilog, 6224KB, 下载1次)
UART 收发模块，可移植，编程平台为vivado
uart communication transceiver module, portable (2020-10-17, Verilog, 17583KB, 下载14次)
vivado使用过程中常见问题总结，NFS挂载问题，SDK裸机编程常见问题，sdk能不能设置保存不自动编译。。。
Summary of common problems in the use of vivado, NFS mount problems, SDK bare machine programming common problems, whether the SDK can be set to save not to automatically compile... (2020-10-12, Verilog, 3297KB, 下载0次)
给予FPGA的can总线编程，FPGA实现CAN总线控制器源码
this software base on fpga Verilog,relizes the can bus communication. (2020-04-13, Verilog, 858KB, 下载9次)
XILINX Veriog 编程大全2015 版(SLX9)
Xilinx veriog programming edition 2015 (slx9) (2020-02-14, Verilog, 15559KB, 下载1次)
实现测试按键的好坏，用verilog 语言编程。
To achieve the quality of the test button, use Verilog language programming (2019-12-15, Verilog, 12063KB, 下载0次)
实现Verilog编程，实现超声波测距模块实现测距功能，并将测得的距离显示在数码管上
Verilog programming is realized, ultrasonic ranging module is realized, and the measured distance is displayed on the digital tube (2019-08-10, Verilog, 10705KB, 下载1次)
CFI控制器顶层模块，32位wishbone总线经典接口，用于简化对CFI flash(如块)的访问解锁、删除和编程。
Top level of CFI controller with 32-bit Wishbone classic interface (2019-07-31, Verilog, 4KB, 下载1次)
一个vivado和matalab混合编程的信号发生器，注意要把vivado里面的核文件路径改一下
A signal generator with mixed programming of vivado and matalab, pay attention to changing the path of the core file in vivado (2019-06-18, Verilog, 534KB, 下载6次)
CPLD、FPGA Veriloog编程必备手册，当你编程时可能是一个无网络的环境，有了这个手册，你就不怕忘了表达式了。
CPLD, FPGA programming manual, when you program may be a network-free environment, with this manual, you are not afraid to forget the expression. (2019-04-24, Verilog, 273KB, 下载2次)
CPLD学习必备资料，CPLD基本例程，对初学和编程参考非常有帮助。
CPLD learning materials, CPLD basic routines, for beginners and programming reference is very helpful. (2019-04-24, Verilog, 7102KB, 下载3次)
FPGA/CPLD平台，关于PS/2接口的编程开发文档
PS/2 interface development document for FPGA/CPLD platform. (2018-11-14, Verilog, 748KB, 下载0次)
upp接口编程资料，实现了UPP接口的双向通信
upp control
reg r_UPP_CH2_START_Sync1;
reg r_UPP_CH2_START_Sync2;
reg r_UPP_CH2_ENABLE_Sync1;
reg r_UPP_CH2_ENABLE_Sync2; (2018-10-11, Verilog, 7KB, 下载4次)
编程实例讲解 新手学习编程必备，verilog编程测试平台程序编写学习
Programming examples to explain the novice learning programming essential, Verilog programming test platform programming learning (2018-09-07, Verilog, 4016KB, 下载1次)
Verilog编程上手EGO1开发教程1
Verilog programming tutorials for EGO1 development 1 (2018-01-04, Verilog, 2980KB, 下载4次)
编程verilog 适用于FPGA开发 适合初学者 极好极好极好
verilog hdl fpga eg01 (2017-12-19, Verilog, 31841KB, 下载1次)
通过verilog语言编程，通过拨动开关来滚动显示预设的字符
Scroll through the switch to display the preset character by programming in the Verilog language (2017-12-08, Verilog, 258KB, 下载1次)
FPGA开发手册，有详细例程开发说明。基于ISE12.3的fpga开发,利用verilog编程。内容详细，是新手学习的好帮手。
FPGA development based on ISE12.3, using Verilog programming. The content is detailed, it is a good helper for a novice. (2017-11-28, Verilog, 27025KB, 下载1次)
fpga搭建sopc,驱动oled显示，用的是Verilog语言编程的
FPGA build SOPC, drive OLED display, using the Verilog programming language (2017-07-29, Verilog, 19KB, 下载11次)