就是用FPGA写的音频加嵌模块。代码很多慢慢看
it is Using FPGA to write audio module. (2018-10-12, Verilog, 63KB, 下载3次)
俄罗斯方块用vga实现 用Verilog代码实现
Tetris is implemented by VGA and implemented by Verilog code. (2018-06-21, Verilog, 18581KB, 下载8次)
用半加器搭建全加器 使用Verilog语言
Using a half adder to build a full adder, using the Verilog language (2017-09-18, Verilog, 274KB, 下载1次)
基于两个半加器和一个异或门组成的全加器（资料中波形图为半加器的时序仿真图）
Based on two half-adder and an exclusive-or gate full adder (profile picture shows a half adder waveform timing simulation diagram) (2016-08-30, VHDL, 61KB, 下载1次)
研究生课程 ： 一维DCT功能实现，以及测试。
From Graduate courses : one-dimensional DCT function implementation, and testing. (2014-07-08, VHDL, 78KB, 下载2次)
AES加解密Verilog HDL源代码，具体的算法参照相关书籍，里面含有testbench
AES encryption and decryption Verilog HDL source code, reference books specific algorithm, which contains testbench (2014-05-09, VHDL, 8KB, 下载19次)
verilog HDL编写的俄罗斯方块程序，包含游戏控制，得分统计，VGA，PS2键盘控制等模块
verilog HDL Tetris program, including game control, Won, VGA, PS2 keyboard control modules (2013-12-24, VHDL, 1903KB, 下载53次)
ise13.2环境下vhdl编写的全加器+仿真波形
ise13.2 vhdl prepared under the full adder+ simulation waveforms (2013-06-01, Visual C++, 447KB, 下载1次)
本代码包含四位全加器和四位全加器的测试平台。
The code contains four full adders and four full adder test platform. (2013-05-23, VHDL, 1KB, 下载3次)
图像降噪GUI界面，用到butterworth滤波器，中值滤波器和维纳滤波器，仅供参考。
noise reduction using media filter (2013-05-03, matlab, 21KB, 下载15次)
基于CS的一维距离像（HRRP）及FFT成像对比
CS-based HRRP and FFT HRRP (2013-04-07, matlab, 2KB, 下载133次)
科斯塔斯环环路滤波器的VHDL实现，仅供参考，同时有计算相关的VHDL实现代码。
Costas loop filter in VHDL, for reference only
And calculates the associated VHDL code.
(2012-07-20, VHDL, 3KB, 下载59次)
利用verilog HDL实现的AES算法，在密码芯片加解密中显示出了突出的优越性
The reference-AES.V which has been uploaded is particularly useful for researchers who are dedicated to the password-chip researching. (2011-11-22, VHDL, 8787KB, 下载20次)
用verilog在半加器的基础上实现了全加器，方法简单巧妙，对于FPGA入门学习很有帮助
In the half adder using verilog on the basis of a full adder, simple and clever, very helpful for the FPGA Starter (2010-12-21, VHDL, 267KB, 下载3次)
完成一维小波变换一级分解。此文件包含小波变换的mallat算法，经测试完全正确。
Completed a one-dimensional wavelet transform decomposition. This file contains the mallat wavelet transform algorithm, the test is correct. (2010-11-05, VHDL, 1522KB, 下载48次)
4位数码管显示,4个按键如加,减,自动加,清零等.
4 digital display, four buttons, such as addition, subtraction, automatic, clear, etc.. (2010-05-19, C/C++, 13KB, 下载22次)
布斯公式求补码乘法的算法，用VHDL语言编写
booth algrithm, work out the 2 s complement mulitplier using VHDL (2010-04-26, VHDL, 1KB, 下载37次)
四位BOOTH乘法器 Booth算法(布斯算法),一个比较推荐的带符号乘法算法
Booth_mul4 (2009-06-07, VHDL, 152KB, 下载33次)
曼彻斯特编解码~VHDL?顾固乇嘟饴雫VHDL曼彻斯特编解码~VHDL
Manchester codec ~ VHDL Manchester codec VHDL Manchester ~ ~ VHDL codec Manchester codec ~ VHDL (2006-06-10, WORD, 10KB, 下载16次)
VHDL实现布斯算法
VHDL Booth algorithm (2005-02-28, Windows_Unix, 2KB, 下载22次)