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按分类查找All 系统设计方案(211) 

[系统设计方案] dlab-handout

这个任务的目的是更熟悉位级表示和操作。你会通过解决一系列的编程难题来解决这个问题。“很多这样的谜题都是人为的,但你会发现的。你自己想的更多的是通过你的方式通过他们,你将学到很多关于如何计算机表示整型数据。
The purpose of this assignment is to become more familiar with bit-level representations and manipulations. You'll do this by solving a series of programming ``puzzles.'' Many of these puzzles are quite artificial, but you'll find yourself thinking much more about bits in working your way through them and you will learn a lot about how computers represent integer data. (2017-12-28, C/C++, 19KB, 下载1次)

http://www.pudn.com/Download/item/id/1514453613294667.html

[系统设计方案] VisvalC_MSComm

该论文提供了利用 Visual C++6.0 MSComm 控件实现串口通信软件的设计, 将 MSComm 控件作为微软公司提供的简单Windows 下串口通信编程的 ActiveX 控件, 它通过串行端口传输和接收数据, 为应用程序提供串行通信功能,
This paper presents the realization of serial communication software using Visual C++6.0 MSComm control, MSComm control as a serial communication programming simple Windows provided by Microsoft Corp under the control of the ActiveX, it is through the serial port transmit and receive data, provide the function of serial communication for the application, This paper presents the realization of serial communication software using Visual C++6.0 MSComm control, MSComm control as a serial communication programming simple Windows provided by Microsoft Corp under the control of the ActiveX, it is through the serial port transmit and receive data, provide the function of serial communication for the application, (2017-04-14, Visual C++, 42KB, 下载2次)

http://www.pudn.com/Download/item/id/1492181489449158.html

[系统设计方案] SSI

一种 SSI 光电编码器数据并行采集设计方法 在光电编码器上 得到了越来越广泛的应用,然而大多数计算机和处理器上没有提供SSI接口,这在一定程度上限 制了SSI接口光电编码器的推广和应用。基于复杂可编程逻辑器件( CPLD)开发的SSI接口模块 SSI208P,实现了SSI接口编码器数据的高速并行采集。本文对SSI208P模块进行了详细介绍,并 给出了硬件设计和软件设计思路及实现方法。
A design method for data parallel acquisition of SSI photoelectric encoder It has been widely used in the photoelectric encoder. However, most of the computers and processors do not provide SSI interface, which limits the popularization and application of SSI interface photoelectric encoder to some extent. Based on the complex programmable logic device (CPLD) development of the SSI interface module SSI208P, SSI interface encoder data to achieve high-speed parallel acquisition. In this paper, the SSI208P module is introduced in detail, and the hardware design and software design ideas and implementation methods are given. (2017-02-14, C51, 143KB, 下载6次)

http://www.pudn.com/Download/item/id/1487035225780052.html

[系统设计方案] SOCKET-programming

本系统的设计与实现主要采用SOCKET编程。同时,使用多线程技术,提高服务器的响应能力和并发处理能力;采用动态哈夫曼编码实现传输流的压缩,减轻网络传输负担;支持断点续传, 用户可以自己选择采用断点续传还是重新上传;实现大文件上传, 一次可以上传多个文件;提供接口全面,可以动态设置上传保存路径, 设置允许扩展名, 允许最大大小等; 可以限制上传单个文件大小, 控制上传带宽上限, 允许文件扩展名, 拒绝文件扩展名等。
Design and Implementation of the system SOCKET programming. At the same time, the use of multi-threading technology, improve server responsiveness and concurrent processing capability dynamic Huffman coding to achieve transport stream compression, to reduce the burden of network transmission support for HTTP, users can choose to use HTTP or re-upload upload large files can upload multiple files at once provide comprehensive interface, you can dynamically set the upload path to save setting allows the extension to allow the maximum size may be to limit Upload a single file size, control upload bandwidth caps, allow file extension, the reject file extension. (2012-12-06, Visual C++, 259KB, 下载31次)

http://www.pudn.com/Download/item/id/2073509.html

[系统设计方案] labview-PID

利用虚拟仪器技术,采用LabVIEW图形编程环境,设计了一个数字PID程序,用于仿真PID控制规律。可以通过改变P、I、D参数和设定值,观察不同情况下的控制曲线,或在同样参数情况下比较位置型PID与增量型PID的控制效果
The virtual instrument technology, using the LabVIEW graphical programming environment, design a digital PID program for the simulation of PID control law. Can change the P, I, D parameters and settings to observe the control curve under different circumstances, or in the case of the same parameters comparative position PID and incremental PID control results (2012-08-08, LabView, 32KB, 下载149次)

http://www.pudn.com/Download/item/id/1960861.html

[系统设计方案] automaticbander

本文致力于研究和开发一种成本低、结构紧凑、操作方便的自动捆扎机。主要工作是根据实际的捆扎工艺,设计了捆扎机的总体结构;然后对捆扎工艺中的关键技术进行了深入研究,设计了机电一体化机构,运用PLC编程来实现控制系统,最终实现捆扎,转动,推箱等动作。本设计为快速方便的实现十字形捆扎提供了一种可靠的装置。
The major work is designing the overall structure of Automatic Strapping Machine according to the actual bind process. Then the key technologies of the labeling are studied, design a mechanism of electromechanical integration, use of PLC programming to achieve control system. Finally, Realize binding, rotating, pushing the carton and other movement. This designed a rapid realization of cross Banding mahchine. (2010-05-26, Visual C++, 277KB, 下载7次)

http://www.pudn.com/Download/item/id/1188522.html

[系统设计方案] Acceleratedcplusplus

●它一开始就向读者教导那些最有用的概念,而不是那些简单的注释 读者很快就能够以此开始编程     ●它描述的是现实中的问题和解决方案,而不是单纯的语言特性 读者不但学习到了这些特性,而且还知道如何把它们应用到程序中去     ●它涵盖的范围同时包括了语言本身和标准库 读者可以从一开始就使用标准库来编写自己的程序
● It is beginning to teach the reader the most useful concepts rather than simply note that the reader will soon be able to start programming ● this is the reality it describes the problems and solutions, not just readers not only the language features Xuexi to these features, but also the 如何 to apply them to Chengxuzhongqu ● It covers the Fan Wei Ben Shen also Baokuo the language and standard library readers from the initial use of the standard library to write their own programs (2010-05-01, Visual C++, 11481KB, 下载1次)

http://www.pudn.com/Download/item/id/1152057.html

[系统设计方案] TherealizationofParallelLUfactorizationbasedonFPGA

本文首先介绍了稀疏矩阵的特点和研究稀疏矩阵分解的意义,接着讨论了稀疏矩阵各种快速算法并给出了本文所采用的方法。在此基础上详细说明了稀疏矩阵模拟排序算法,直接LU分解算法,符号LU分解算法,数值LU分解算法及这些算法在FPGA上的实现过程。最后为充分发挥FPGA作为一种可编程逻辑器件的优势,将单核数值LU分解扩展为多核并行LU分解结构,并使用BDB矩阵对该结构进行了验证,给出并分析了实验结果。
Firstly,the characteristies and research value of sparse matrix are introduced.Then we describe various methods that have been explored in the past for speeding-up the process of LU factorization,on the basis of which our designs al e presented including sparse ordering methods,LU factorization,symbolic LU factorization,numerical LU factorization and their realization based on FPGA.Finally,by taking advantage of FPGA resources we implement a parallel LU factorization which iS verified by BDB sparse matrix and we analyze the experimental results (2010-03-25, VHDL, 4177KB, 下载17次)

http://www.pudn.com/Download/item/id/1099316.html

[系统设计方案] DesignofFloatingPointCalculatorBasedonFPGA

给出系统的整体框架设计和各模块的实现,包括芯片的选择、各模块之间的时序以及控制、每个运算模块详细的工作原理和算法设计流程;通过VHDL语言编程来实现浮点数的加减、乘除和开方等基本运算功能;在Xilinx ISE环境下,对系统的主要模块进行开发设计及功能仿真,验证 了基于FPGA的浮点运算。
The overall framework of system design and realization of each module which contain selection of chip,timing and control between modules,detailed principle and design process of algorithm for each module were all described;The basic calculating functions of floating-point numbers,such as addition, subtraction,multiplication,division and extraction were implemented with VHDL. In the circumstance of Xilinx ISE,the development and functional simulation for main modules of system were accomplished,and then floating point calculation based on FPGA Was confirmed (2010-03-25, VHDL, 3407KB, 下载16次)

http://www.pudn.com/Download/item/id/1099299.html

[系统设计方案] duogongnenghongwaiyaokong

本系统设计结合单片机STC89C51编程实现的遥控开关来控制家用电器,让人们用一台遥控器控制电冰箱、电风扇、饮水机等家电。本设计的核心是以单片机stc89c51,利用光电耦合器来检测小车的形式的速度和距离,利用led显示小车的运动的状态和行车里程,并且外加电磁蜂鸣器来警告已接收到遥控信号,本文着重介绍了该系统的硬件设计方法及软件设计的办法。
The system design coupled with the remote control MCU STC89C51 programming switches to control household appliances, allow people to use a single remote control refrigerators, electric fans, water dispenser and other home appliances. The core of this design is based on SCM stc89c51, the use of optical coupler to detect the form of car speed and distance, using the movement led display car status and mileage, and the external electromagnetic buzzer to warn has received remote control signal, this paper focuses on the system' s hardware design methods and software design approach. (2010-03-18, WORD, 136KB, 下载25次)

http://www.pudn.com/Download/item/id/1090877.html

[系统设计方案] Keyboard_Anti-Shake

首先介绍了防抖型矩阵式键盘的整体设计思路,然后采用模块化设计方法对各个电路用VHDL进行设计,最后进行顶层文件设计和仿真,并用PLD器件下载验证.整个电路具有故障率低、使用灵活、便于修改、在系统可编程性及可移植性强等优点.
First introduced the anti-shake-type matrix keyboard' s overall design concept, and then use a modular design approach to the various circuits VHDL design, last, top-level document design and simulation, and verification using PLD device to download. The whole circuit has a failure rate is low, the use of flexible, easy to modify, in the system programmability and portability strong advantages. (2010-03-14, VHDL, 490KB, 下载4次)

http://www.pudn.com/Download/item/id/1086534.html

[系统设计方案] CPLD_KEYBOARD

本设计是用VHDL语言来实现的基于RS232按位串行通信总线的行列式矩阵键盘接口电路,具有复位和串行数据的接收与发送功能,根据发光二极管led0—led2的显示状态可判断芯片的工作情况;实现所有电路功能的程序均是在美国 ALTERA公司生产的具有现场可编程功能的芯片EPM7128SLC84-15上调试通过的。该电路的设计贴近生活,实用性强,制成芯片后可作为一般的PC机键盘与主机的接口使用。
The design is based on VHDL language to achieve bit serial RS232 communication bus according to the determinant of matrix keyboard interface circuit with a reset, and serial data reception and transmission capabilities, according to light-emitting diode display led0-led2 status can be judged chip work to achieve all the circuit functions of the program are produced in the United States has ALTERA Field Programmable functions EPM7128SLC84-15 on-chip debug passed. The circuit design of daily life, practical, post-produced chips can be used as a general PC, the keyboard and the host interface. (2010-03-14, VHDL, 66KB, 下载9次)

http://www.pudn.com/Download/item/id/1086529.html

[系统设计方案] MyHospital

此医院排队就诊系统设计是用c#基于.NET编程做的,具体功能如下: 1.输入病历号,点“排队”按钮,加入到排队队列中。 2.点“就诊”按钮,队列中最前面的病人就诊。 3.界面有自动显示队列排队情况、队列中总排队人数的对话框。 4.点“不再排队”按钮,不再允许输入病历号排队。 5.点“恢复排队”按钮,系统恢复正常。 6.点“退出”按钮,系统退出。
This hospital queuing treatment system design is to use c#-based. NET programming to do, specific functions are as follows: 1. Enter the medical record number, point " queue" button added to the queue queue. 2. Spot " treatment" button to the top of the queue of patients treatment. 3. Interface, with automatic display of the queue queue queue queue in the total number of dialog boxes. 4. Point " will no longer queue" button, no longer allowed to enter the medical record number line. 5. Point " restore queue" button, the system returned to normal. 6. Point " Exit" button, the system out. (2010-01-29, Visual C++, 42KB, 下载189次)

http://www.pudn.com/Download/item/id/1054644.html

[系统设计方案] DelphiandMatlab

  简要介绍了 Del phi与 Matlab各自的优缺点 ,较为全面地列举和分析了二者接口编程的几种方式 ,重点讨论了 Del phi调 用 Matlab编译生成的 COM组件的方法和原理 ,实现二者的无缝集成。提供的实现过程和应用实例均说明了该方法简便、 可操作性 强。通过 Del phi和 Matlab的整合 ,可以根据实际需要 ,开发功能强大而且界面友好的软件。
Del phi outlined the advantages and disadvantages of each and Matlab, a more comprehensive list and analysis of the programming interface between a number of ways, focused on the Matlab Compiler Del phi call COM components generated by the methods and principles, to achieve both seamless integration. Provide the realization of the process and application examples illustrate the methods are simple, easy to operate. Del phi and through the integration of Matlab can be based on actual needs, the development of powerful and user-friendly software. (2009-06-15, Delphi, 734KB, 下载44次)

http://www.pudn.com/Download/item/id/807360.html

[系统设计方案] boot_loader_slaa096d

引导加载(有时被称为引导)的MSP430的衍生物与快闪记忆体允许进入其嵌入式记忆体在原型,生产,还是在外地。这是可能下载或修改代码中的快闪记忆体(电可擦除和可编程存储器)或存储校准数据或其他系统的相关数据在快闪记忆体或RAM中。
Application of Bootstrap Loader in MSP430 With Flash Hardware- The bootstrap loader (sometimes called the bootloader) of MSP430 derivatives with flash memory allows access to their embedded memories during prototyping, production, and in the field. It is possible to download or modify code in flash memory (electrically-erasable and programmable memory) or to store calibration data or other system-relevant data in flash memory or in RAM. (2009-03-27, Visual C++, 207KB, 下载7次)

http://www.pudn.com/Download/item/id/690562.html

[系统设计方案] fpgafft

:文章针对目前数字信号处理中大量采用的快速傅立叶变换[FFT] 算法采用软件编程来处理的应用现状,在对FFT 算法进行 分析的基础上,给出了用FPGA[Field Programmable Gate Array] 实现的8 点32 位FFT 处理器方案,并得到了系统的仿真结果。 最后在Altera 公司FLEX10K系列FPGA 芯片上成功地实现了综合。
Based on the analysis of the FFT algorithm , a reasonable logic structure for a 8-point ,32- bit FFT processor is described and the simulating result is given in this paper. The processor is implemented on the FLEX10Kfamily of FPGAs. (2009-02-17, VHDL, 215KB, 下载38次)

http://www.pudn.com/Download/item/id/645686.html

[系统设计方案] WinRAR

本文主要描述了如何利用汇编语言编写一个能够实现网络之间信息传递的聊天程序系统.并介绍了无连接协议的SOCKET编程模型,以及阐述了聊天程序的设计目的前景和具体规划,还有聊天程序的商业运作.本论文共分为五部分. 第一部分简单的分析了即时聊天系统开发的可行性,并重点对技术可行性(选择VB)做了详细分析; 第二部分借助数据流图和数据字典对系统的功能和性能进行了详细的需求分析,建立了系统的逻辑结构; 第三部分利用VB程序设计了UDP聊天程序; 第四部分验证了设计的程序; 第五部分是此次设计的结论总结及部分参考文献和附录。
err (2008-10-31, Visual Basic, 95KB, 下载8次)

http://www.pudn.com/Download/item/id/570674.html

[系统设计方案] 1234

介绍MT9V011 CMOS数字图像传感器在一个基于低端ARM7处理器和CPLD(可编程逻辑器件)的嵌入式系统中的应用。通过一片CPLD读取MT9V011采集的图像并缓存到存储器以备后续的处理。利用PC平台验证了图像采集功能。给出了一个在低端嵌入式系统中增加图像采集功能的实现方案。
Introduction MT9V011 CMOS digital image sensor in a low-end ARM7-based processor and CPLD (Programmable Logic Device) embedded systems. CPLD to read through a collection of images and MT9V011 cache memory to prepare for the follow-up treatment. Validate the use of PC platform, image capture function. Given a low-end embedded systems increase the image acquisition function in the realization of the program. (2008-07-11, PDF, 470KB, 下载62次)

http://www.pudn.com/Download/item/id/509064.html

[系统设计方案] phase

设计了一基于现场可编程门阵列(FPGA)的低频数字式相位测量仪。该测量仪包括数字式移相信号发生器和相位测量仪两部分,分别完成移相信号的发生及其频率、相位差的预置及数字显示、发生信号的移相以及移相后信号相位差和频率的测量与显示几个功能。其中数字式移相信号发生器可以产生预置频率的正弦信号,也可产生预置相位差的两路同频正弦信号,并能显示预置频率或相位差值;相位测量仪能测量移相信号的频率、相位差的测量和显示。两个部分均采用基于FPGA的数字技术实现,使得该系统具有抗干扰能力强, 可靠性好等优点。 (2008-05-10, VHDL, 590KB, 下载174次)

http://www.pudn.com/Download/item/id/458481.html

[系统设计方案] plus1122

1问题描述: 设计一个实现稀疏多项式乘法的程序 2需求分析: 编程实现两个一元多项式相乘,要求: 2.1输入并建立多项式; 2.2输出多项式,输出形式为整数序列:n,c1,e1,c2,e2``````,cn.,en,其中n是多项式的系数,ci和ei分别是第i项的系数和指数,序列按指数降序排列。 2.3多项式a和b相乘,建立结果多项式a*b
a Problem description : Design a sparse polynomial multiplication achieve the two procedures demand analysis : Programming 2 1 yuan polynomial multiplication, requirements : 2.1 to import and establish polynomial; 2.2 Output polynomial, Output form of integer sequence : n, c1, e1, c2, e2 ``````, cn. , en, where n is the polynomial coefficients, respectively ei ci and is the first item i coefficient and the index sequence index in descending order. 2.3 polynomial multiplication a and b, the results establish a* b polynomial (2006-12-23, C/C++, 49KB, 下载24次)

http://www.pudn.com/Download/item/id/235846.html
总计:211