YosysModule导出器，，
YosysModuleExporter,, (2023-09-30, Verilog, 0KB, 下载0次)
测试台生成器，，
TestBenchGenerator,, (2019-01-11, Verilog, 0KB, 下载0次)
在电子学中，多路复用器（或多路复用器；有时拼写为多路复用器，也称为数据选择器）是在...、...，
In electronics, a multiplexer (or mux; spelled sometimes as multiplexer, also known as a data selector, is a device that selects between several analog or digital input signals and forwards the selected input to a single output line. (2021-07-24, Verilog, 0KB, 下载0次)
32位定时器计数器捕获PWM软IP（Verilog），
A 32-bit Timer Counter Capture PWM Soft IP (Verilog), (2023-08-10, Verilog, 0KB, 下载0次)
具有AXI-4 DMA的HW JPEG解码器包装器，
HW JPEG decoder wrapper with AXI-4 DMA, (2020-10-25, Verilog, 0KB, 下载0次)
32位定时器计数器捕获PWM软IP（Verilog）
A 32-bit Timer Counter Capture PWM Soft IP (Verilog) (2023-06-05, Verilog, 177KB, 下载0次)
Verilog中的Sega Genesis Mega Drive控制器编码器
Sega Genesis Mega Drive controller encoder in Verilog (2019-05-15, Verilog, 77KB, 下载0次)
NutShellTeam,果壳处理器研究小组(Topic:基于RISCV64果核处理器的卷积神经网络加速器研究)
NutShellTeam, Fruit Shell Processor Research Group (Topic: Convolutional Neural Network Accelerator Research Based on RISCV64 Fruit Core Processor) (2022-05-28, Verilog, 17267KB, 下载0次)
verilog语言实现锁存器，可在quartusII运行
It can run in Verilog II (2021-03-16, Verilog, 1KB, 下载0次)
D触发器的实现，里面有teshbench文件及源文件
Implementation of D flip flop (2020-11-22, Verilog, 32KB, 下载0次)
高阶LC滤波器
3rd order LC filter
3rd order LC filter with subcircuit (2020-09-30, Verilog, 3KB, 下载0次)
给予FPGA的can总线编程，FPGA实现CAN总线控制器源码
this software base on fpga Verilog,relizes the can bus communication. (2020-04-13, Verilog, 858KB, 下载9次)
定时器，可以完成倒计时，分别由时分秒的倒计时，可以在随意时间按下按键停止计时。
Timer, can complete the countdown, respectively by the minute of the countdown, you can press the button at any time to stop timing. (2020-03-06, Verilog, 14KB, 下载0次)
触发器的代码及测试文件，八选一数据选择器的代码及测试文件，全加器的代码及测试文件
Trigger code and test file, one out of eight data selector code and test file, full adder code and test file (2019-12-12, Verilog, 1KB, 下载0次)
温度传感器DS18B20解析代码，已验证
Temperature sensor DS18B20 parse code, has been verified (2018-12-27, Verilog, 2KB, 下载0次)
内含基于FPGA实现，智力抢答器，分频器，和滤波器三种基础Verilog编写教程，有利于新手对FPGA练习
It contains three basic Verilog tutorials: implementation based on FPGA, intelligent answering device, frequency divider and filter, which are helpful for novices to practice on FPGA. (2018-12-25, Verilog, 4927KB, 下载2次)
uvm寄存器模型的示例和具体用法，包括仿真平台的使用
Examples and specific usage of UVM register model, including the use of simulation platform. (2018-10-21, Verilog, 81KB, 下载20次)
用Verilog语言实现4位二进制同步计数器的功能
Write a program in Verilog language to implement the fouction of Four binary synchronous counters. (2018-04-11, Verilog, 31KB, 下载13次)
一种SPI FLASH控制器的实现方式，已验证
spi flash controller (2018-04-11, Verilog, 704KB, 下载8次)
读写控制器，带满和空指示，拿出来和大家分享
Read-write controller (2017-11-14, Verilog, 3228KB, 下载1次)