数字系统设计（DDS）课程小型项目（学年：2023-24）详情。。。，
Design of Digital Systems (DDS) course Mini-Project (Academic Year: 2023-24) details ..., (2023-10-20, Verilog, 0KB, 下载0次)
使用Verilog的PWM发生器，，
PWM-Generator-Using-Verilog,, (2023-08-24, Verilog, 0KB, 下载0次)
k7_dds_dma_ddr3_基础，，
k7_dds_dma_ddr3_base,, (2016-05-20, Verilog, 0KB, 下载0次)
dds生成正弦波文件,主要是用ip核，通过改变相位控制字来实现频率的调节。
generate the sine waveform using the dds. (2021-01-28, Verilog, 11985KB, 下载0次)
FPGA函数发生器的实现，逻辑分析仪和ModelSim显示
FPGA function generator implementation, logic analyzer and Modelsim display (2020-12-26, Verilog, 179KB, 下载0次)
AD9954 DDS开发板-点频9954(ok)
verilog 语言
AD9954 DDS demo codes (2020-03-31, Verilog, 706KB, 下载2次)
电子设计大赛题目，实现一个基本的波形发生器，并实现频率计能狗准确测量
The realization of a basic waveform generator, and the realization of frequency meter can be accurately measured dog (2020-03-13, Verilog, 17KB, 下载0次)
可以产生最基本的三角波，正弦波，方波信号，比较简单
You can generate triangular wave, sine wave, square wave signals (2020-03-13, Verilog, 1KB, 下载1次)
基于ADV7511/ADV7511W/ADV7513的视频发生器
Video generator based on adv7511 / adv7511w / adv7513 (2020-01-25, Verilog, 194KB, 下载5次)
VERILOG 和电图的结合做dds 可产生正弦波 方波 锯齿波
The combination of Verilog and electrogram can produce sine wave, square wave and sawtooth wave by DDS (2019-11-28, Verilog, 230KB, 下载1次)
用 AD9910实现的DDS 线性调频信号,调试已通过 可以使用
DDS LFM signal realized by ad9910 has passed debugging and can be used (2019-10-23, Verilog, 1475KB, 下载21次)
使用DE2实现DDS，步骤简单，配置管脚可自查看
Using DE2 to realize DDS, the steps are simple and the pins can be self-checked. (2019-07-19, Verilog, 3029KB, 下载2次)
本工程使用A7系列FPGA产生DDS，用DAC0832进行正弦电压输出
In this project, A7 series FPGA is used to generate DDS, and DAC0832 is used for sinusoidal voltage output (2019-05-06, Verilog, 15402KB, 下载3次)
在Vivado下完成AD输入到下变频的功能，频率可配置，通用化设计。
The function of AD input to down conversion is completed under Vivado, and the frequency is configurable and universal design. (2018-11-15, Verilog, 5660KB, 下载19次)
基于Quartus II，DDS信号源程序
Based on Quartus II, DDS source (2018-06-01, Verilog, 4086KB, 下载1次)
基于verilog的dds实现，可以实现正弦波、三角波和锯齿波，基于ISE14.7
Verilog based DDS implementation, can achieve sine wave, triangle wave and sawtooth wave, based on ISE14.7 (2018-05-17, Verilog, 17892KB, 下载7次)
一个频率可调节的DDS。带仿真数据还有板及仿真
A frequency adjustable DDS. Simulation data, board and simulation (2018-05-03, Verilog, 6793KB, 下载4次)
基于Verilog语言实现DDS（数字频率合成器）的设计，有完整的工程设计代码和仿真脚本
Verilog language based on DDS (digital frequency synthesizer) design, there is a complete engineering design code and simulation scripts (2017-08-11, Verilog, 7330KB, 下载12次)
FPGA 实验程序 DDS 实验程序
FPGA PROCEDURE SHANDONG UNIVERSITY (2017-07-18, Verilog, 16415KB, 下载9次)
基于串行DA芯片TLC5620的正弦信号发生器
A sinusoidal signal generator based on serial DA chip TLC5620 (2017-07-17, Verilog, 708KB, 下载4次)