基于布尔函数的伪随机发生器的设计，
Design of a boolean function based pseudo random generator, (2023-09-30, Verilog, 0KB, 下载0次)
Verilog中的直接数字合成，
Direct Digital Synthesis in Verilog, (2023-09-21, Verilog, 0KB, 下载0次)
使用Icarus Verilog和GTKWave作为波形查看器设计和测试的简单Verilog-Gates，
Simple Verilog Gates designed and tested with Icarus Verilog and GTKWave as a waveform viewer, (2023-01-10, Verilog, 0KB, 下载0次)
De0 Nano的Verilog波发生器和脉宽调制器（PWM）
Verilog wave generator and pulse width modulator (PWM) for De0 Nano (2015-10-09, Verilog, 9KB, 下载0次)
基于Cadence，，的正弦波发生器的实现与分析，，
Implementation-and-Analysis-of-Sine-Wave-Generator-using-Cadence,, (2023-04-08, Verilog, 769KB, 下载0次)
基于Box-Mueller方法的FPGA加性高斯白噪声发生器
FPGA Additive White Gaussian Noise Generator Using the Box Mueller Method (2016-10-07, Verilog, 4537KB, 下载0次)
Verilog AMBA AHB多层互连发生器
A Verilog AMBA AHB Multilayer interconnect generator (2017-08-08, Verilog, 26KB, 下载0次)
此项目(完全自己编写)是基于FPGA的测频功能实现,拥有自设发生频率、测试频率、频率显示等完备功能
This project (written by myself) is the realization of frequency measurement function based on FPGA, with self setting frequency, test frequency, frequency display and other complete functions (2021-04-19, Verilog, 4946KB, 下载0次)
使用ROM存储正弦波MIF，由地址产生模块和频率控制模块，输出FSK信号
FPGAFSKsignalgennerater (2019-07-06, Verilog, 8804KB, 下载1次)
一个vivado和matalab混合编程的信号发生器，注意要把vivado里面的核文件路径改一下
A signal generator with mixed programming of vivado and matalab, pay attention to changing the path of the core file in vivado (2019-06-18, Verilog, 534KB, 下载52次)
可以用来代替模拟PWM发生器，产生PWM的速度可达200M。
It can be used to replace the analog PWM generator. The speed of generating PWM can reach 200M. (2019-04-06, Verilog, 5KB, 下载2次)
可生成10位控制的PWM波形的verlog代码块。
The verlog code block of 10-bit PWM waveform can be generated. (2019-03-29, Verilog, 1KB, 下载0次)
控制9914芯片，生成数字信号，芯片为DDS专业芯片，实践验证可以使用。
Control 9914 chip to generate digital signal. The chip is DDS professional chip, which can be used in practice. (2019-02-27, Verilog, 2KB, 下载1次)
利用AD、DA和VGA三个外设来实现简易示波器，DA外设发送正弦波给AD外设，AD外设解析成数字信号将数据送给VGA外设进行显示。在VGA上可以看到DA外设发送的波形、波形频率和波形峰峰值。
The simple oscilloscope is realized by using AD, DA and VGA peripherals. The DA peripheral sends sine wave to the AD peripheral, and the AD peripheral resolves into digital signal to send data to the VGA peripheral for display. On VGA, we can see the waveform, waveform frequency and waveform peak value transmitted by DA peripheral. (2018-10-16, Verilog, 3350KB, 下载4次)
画波形 工具 方便
waveform tool (2018-07-06, Verilog, 1278KB, 下载0次)
i2c(I2C)波形记录详解，帮助理解i2c时序，OV7670 的SCCB (I2C)波形记录.pdf
OV7670 SCCB (I2C).pdf (2018-06-04, Verilog, 276KB, 下载4次)
在FPGA硬件平台上，生成一个IP核，调用IP核来形成信号发生单元
A sin generater based on IP core in FPGA (2018-05-07, Verilog, 51KB, 下载2次)
AD9767高速双通道DAC模块资料包，含使用说明，DDS工程源码
Ad 9767 high-speed dual-channel DAC module data package, including instructions, DDS engineering source code (2018-05-02, Verilog, 39426KB, 下载26次)
示例代码.......AD开发专用。。。。。。。。。
example code...make it easy to develop hardware (2017-11-01, Verilog, 1567KB, 下载3次)
汽车VCU控制器测试工装的程序，STM32单片机扩展总线读写FPGA内部RAM，DDS方式产生PWM，PWM频率，脉宽测量功能
Automotive VCU controller test tooling procedures, STM32 microcontroller expansion bus read and write FPGA, the internal RAM, DDS way to generate PWM, PWM frequency, pulse width measurement function (2017-07-12, Verilog, 7495KB, 下载9次)